| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge pull request #5 from dgilbert999/gcc-4_9_2-ppe42gcc-4_9_2-ppe42 | Doug Gilbert | 2017-10-13 | 3 | -3/+3 |
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| | * | unsupported insn for bswap emitted | Doug Gilbert | 2017-10-06 | 3 | -3/+3 |
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| * | Merge pull request #4 from dgilbert999/gcc-4_9_2-ppe42 | Patrick Williams | 2017-09-05 | 2 | -16/+27 |
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| | * | Indicate that PPE42 fused branch instructions modify the CR | Doug Gilbert | 2017-08-18 | 2 | -16/+27 |
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| * | Merge pull request #3 from dgilbert999/gcc-4_9_2-ppe42 | Patrick Williams | 2017-03-29 | 4 | -9/+123 |
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| | * | Prevent unsupported load/store index updateinstructions on PPE | Doug Gilbert | 2017-02-10 | 1 | -5/+119 |
| | * | Fix compile issue when compiling with gcc 6 | Douglas Gilbert | 2017-01-17 | 3 | -4/+4 |
| * | | Merge pull request #2 from dgilbert999/gcc-4_9_2-ppe42 | Patrick Williams | 2016-10-29 | 2 | -29/+22 |
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| | * | Fix insn attribute length field for load zero-extend operation | Doug Gilbert | 2016-10-28 | 2 | -29/+22 |
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| * | Merge pull request #1 from dgilbert999/gcc-4_9_2-ppe42 | Patrick Williams | 2016-09-15 | 1 | -4/+21 |
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| | * | PPE42 compare immediate branch with immediate value out of range | Doug Gilbert | 2016-09-13 | 1 | -4/+21 |
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| * | requre 8 byte alignment on offsettable memory access for 64bit load/store | Doug Gilbert | 2016-08-15 | 3 | -6/+27 |
| * | Add RTL to correctly handle unavailable lwzux instruction | Doug Gilbert | 2016-08-15 | 1 | -2/+15 |
| * | PPE42 compiler generates invalid crnot instruction | Doug Gilbert | 2016-08-15 | 1 | -2/+6 |
| * | Turn off 64bit load/stores in epilog/proglog | Doug Gilbert | 2016-08-15 | 2 | -4/+6 |
| * | Fix PPE42 illegal stwux asm command | Doug Gilbert | 2016-08-15 | 2 | -2/+26 |
| * | Unsigned compare immediate branch emitting wrong instructions | Doug Gilbert | 2016-08-15 | 2 | -1/+7 |
| * | Remove more places lbzux was being used | Doug Gilbert | 2016-08-15 | 1 | -466/+507 |
| * | Fix where signed compare should be unsigned compare | Doug Gilbert | 2016-08-15 | 1 | -11/+10 |
| * | Delivered 05/2015 | Doug Gilbert | 2016-08-15 | 2 | -1/+3 |
| * | provide clrbwibc | Doug Gilbert | 2016-08-15 | 2 | -30/+45 |
| * | bnbwi support | Doug Gilbert | 2016-08-15 | 4 | -6/+144 |
| * | Add ppe405 and ppe42 cpu types | Doug Gilbert | 2016-08-15 | 8 | -112/+146 |
| * | 64 bit load/store peepholes | Doug Gilbert | 2016-08-15 | 3 | -13/+188 |
| * | 64 bit load/store | Doug Gilbert | 2016-08-15 | 3 | -19/+43 |
| * | Compare-branch fused instructions | Doug Gilbert | 2016-08-15 | 4 | -31/+204 |
| * | hack1 | Doug Gilbert | 2016-08-15 | 4 | -890/+900 |
| * | Mark as release | gccadmin | 2014-10-30 | 1 | -1/+0 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
| * | Mark ChangeLog | gccadmin | 2014-10-30 | 1 | -0/+4 |
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index : ppe42-gcc | |
| GCC for the PPE42 | Raptor Computing Systems |
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