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| author | Patrick Williams <patrick@stwcx.xyz> | 2017-09-05 14:54:08 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-09-05 14:54:08 -0500 |
| commit | f8c463f16d47773cfd9946a8948a50efde3fee14 (patch) | |
| tree | ba53b2cd3b086fc51f3c4451dcd9a05d5825fad2 | |
| parent | ffd86801c045a8514070acd057157b542b126cff (diff) | |
| parent | 49f8800766977e7702ac7e06f8f8ec6989d8aa3d (diff) | |
| download | ppe42-gcc-f8c463f16d47773cfd9946a8948a50efde3fee14.tar.gz ppe42-gcc-f8c463f16d47773cfd9946a8948a50efde3fee14.zip | |
Merge pull request #4 from dgilbert999/gcc-4_9_2-ppe42
Indicate that PPE42 fused branch instructions modify the CR
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 29 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 14 |
2 files changed, 27 insertions, 16 deletions
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 3ee85aaf9e1..023d650ea52 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -19172,12 +19172,19 @@ rs6000_emit_cbranch (enum machine_mode mode, rtx operands[]) } else // Use the PPE fused compare-branch instructions { - emit_jump_insn(gen_rtx_SET(VOIDmode, - pc_rtx, - gen_rtx_IF_THEN_ELSE(VOIDmode, - operands[0], - loc_ref, - pc_rtx))); + rtx cc_clobber = gen_rtx_CLOBBER (CCmode, gen_rtx_REG(CCmode,CR0_REGNO)); + emit_jump_insn + ( gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec(2, + gen_rtx_SET(VOIDmode, + pc_rtx, + gen_rtx_IF_THEN_ELSE(VOIDmode, + operands[0], + loc_ref, + pc_rtx)), + cc_clobber)) + ); } } @@ -19188,7 +19195,7 @@ rs6000_emit_cbranch (enum machine_mode mode, rtx operands[]) OP is the conditional expression. XEXP (OP, 0) is assumed to be a condition code register and its mode specifies what kind of - comparison we made. + comparison is being done. REVERSED is nonzero if we should reverse the sense of the comparison. @@ -19208,7 +19215,7 @@ output_fused_cbranch (rtx operands[], const char *label, rtx insn) if(need_longbranch) code = reverse_condition (code); - + switch (code) { case NE: @@ -19260,7 +19267,7 @@ output_fused_cbranch (rtx operands[], const char *label, rtx insn) s += sprintf(s, "cmp%sw%sb%s %d, %d", logical, immed, ccode, REGNO(operands[2]), op3); - + if (need_longbranch) s += sprintf(s, ",$+8\n\tb %s", label); else @@ -19282,7 +19289,7 @@ output_fused_bnbwi(rtx operands[], const char *label, bool longbranch) if(longbranch) code = reverse_condition (code); - + switch (code) { case NE: // not eq zero so it's 1 @@ -19299,7 +19306,7 @@ output_fused_bnbwi(rtx operands[], const char *label, bool longbranch) bit_value, regno, bitpos); - + if (longbranch) s += sprintf(s, ",$+8\n\tb %s", label); else diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 1f01f8e4d46..c4af8d35bc5 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -14930,7 +14930,8 @@ (match_operand:SI 3 "const_int_operand" "")) (const_int 0)]) (label_ref (match_operand 0 "" "")) - (pc)))] + (pc))) + (clobber (reg:CC CR0_REGNO))] "(rs6000_cpu == PROCESSOR_PPE42) && optimize_size" "* { @@ -14946,7 +14947,8 @@ (match_operand:SI 3 "exact_log2_inverted_cint_operand" "n")) (const_int 0)]) (label_ref (match_operand 0 "" "")) - (pc)))] + (pc))) + (clobber (reg:CC CR0_REGNO))] "(rs6000_cpu == PROCESSOR_PPE42) && optimize_size" "* { @@ -14969,7 +14971,8 @@ [(match_operand:GPR 2 "gpc_reg_operand" "r") (match_operand:GPR 3 "gpc_reg_operand" "r")]) (label_ref (match_operand 0 "" "")) - (pc)))] + (pc))) + (clobber (reg:CC CR0_REGNO))] "(rs6000_cpu == PROCESSOR_PPE42) && optimize_size" "* { @@ -14982,12 +14985,13 @@ ;; illegal immediaate values (define_insn "*cmpwib" - [(set (pc) + [(set (pc) (if_then_else (match_operator 1 "rs6000_fused_cbranch_operator" [(match_operand:GPR 2 "gpc_reg_operand" "r") (match_operand:SI 3 "u5bit_cint_operand" "I")]) (label_ref (match_operand 0 "" "")) - (pc)))] + (pc))) + (clobber (reg:CC CR0_REGNO))] "(rs6000_cpu == PROCESSOR_PPE42) && optimize_size" "* { |
