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author | Doug Gilbert <dgilbert@us.ibm.com> | 2017-10-06 09:34:44 -0500 |
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committer | Doug Gilbert <dgilbert@us.ibm.com> | 2017-10-06 09:34:44 -0500 |
commit | 35b1c5c7fb6699541b35cd0fd6414d08b9af5ebe (patch) | |
tree | 2c0223224c8d7c263087cdc2bb8da39bf8dc7bb7 | |
parent | f8c463f16d47773cfd9946a8948a50efde3fee14 (diff) | |
download | ppe42-gcc-35b1c5c7fb6699541b35cd0fd6414d08b9af5ebe.tar.gz ppe42-gcc-35b1c5c7fb6699541b35cd0fd6414d08b9af5ebe.zip |
unsupported insn for bswap emitted
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 2 | ||||
-rw-r--r-- | gcc/cp/cfns.gperf | 2 | ||||
-rw-r--r-- | gcc/cp/cfns.h | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index c4af8d35bc5..59a346261c1 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -2412,7 +2412,7 @@ [(set (match_operand:SI 0 "reg_or_mem_operand" "") (bswap:SI (match_operand:SI 1 "reg_or_mem_operand" "")))] - "" + "rs6000_cpu != PROCESSOR_PPE42" { if (!REG_P (operands[0]) && !REG_P (operands[1])) operands[1] = force_reg (SImode, operands[1]); diff --git a/gcc/cp/cfns.gperf b/gcc/cp/cfns.gperf index 3a85aaa936f..05ca753927e 100644 --- a/gcc/cp/cfns.gperf +++ b/gcc/cp/cfns.gperf @@ -21,7 +21,7 @@ __inline #endif static unsigned int hash (const char *, unsigned int); #ifdef __GNUC__ -//__inline +__inline #endif const char * libc_name_p (const char *, unsigned int); %} diff --git a/gcc/cp/cfns.h b/gcc/cp/cfns.h index dca250ef555..c845ddf08ea 100644 --- a/gcc/cp/cfns.h +++ b/gcc/cp/cfns.h @@ -52,7 +52,7 @@ __inline #endif static unsigned int hash (const char *, unsigned int); #ifdef __GNUC__ -//__inline +__inline #endif const char * libc_name_p (const char *, unsigned int); /* maximum key range = 391, duplicates = 0 */ |