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author | Doug Gilbert <dgilbert@us.ibm.com> | 2016-09-12 12:32:45 -0500 |
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committer | Doug Gilbert <dgilbert@us.ibm.com> | 2016-09-13 10:31:29 -0500 |
commit | 5101dc76eb78eef67a1ab99a3c4583b663a19b80 (patch) | |
tree | 11c2aeb87c50f29800917f2211c03d190ac91974 | |
parent | 246277a8513f622a65f97cb59e3079fc8834a913 (diff) | |
download | ppe42-gcc-5101dc76eb78eef67a1ab99a3c4583b663a19b80.tar.gz ppe42-gcc-5101dc76eb78eef67a1ab99a3c4583b663a19b80.zip |
PPE42 compare immediate branch with immediate value out of range
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 25 |
1 files changed, 21 insertions, 4 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index a27e1c6f6cc..355a507780a 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -14854,14 +14854,31 @@ ;; Define PPE fused compare and branch -;; There is no cmplwib<cond> fused instruction!!! -;; If op 3 is a reg then no problem - if op3 is short then use -;; something else - checked in predicate rs6000_fused_cbranch_operator +;; There is no cmplwib... fused instruction!!! + (define_insn "*cmpwb" [(set (pc) (if_then_else (match_operator 1 "rs6000_fused_cbranch_operator" [(match_operand:GPR 2 "gpc_reg_operand" "r") - (match_operand:GPR 3 "reg_or_short_operand" "rI")]) + (match_operand:GPR 3 "gpc_reg_operand" "r")]) + (label_ref (match_operand 0 "" "")) + (pc)))] + "(rs6000_cpu == PROCESSOR_PPE42) && optimize_size" + "* +{ + return output_fused_cbranch (operands, \"%l0\", insn); +}" + [(set_attr "type" "fused_branch")]) + + +;; Keep this separate from above to prevent reload from forming +;; illegal immediaate values + +(define_insn "*cmpwib" + [(set (pc) + (if_then_else (match_operator 1 "rs6000_fused_cbranch_operator" + [(match_operand:GPR 2 "gpc_reg_operand" "r") + (match_operand:SI 3 "u5bit_cint_operand" "I")]) (label_ref (match_operand 0 "" "")) (pc)))] "(rs6000_cpu == PROCESSOR_PPE42) && optimize_size" |