Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Add testcase for underscore in NATURAL | Larry Doolittle | 2017-11-28 | 1 | -1/+2 |
| | |||||
* | Added support to entity instantiations | Rodrigo Alejandro Melo | 2017-11-28 | 2 | -7/+8 |
| | |||||
* | Take two files out of exclude list | Larry Doolittle | 2017-11-27 | 1 | -2/+0 |
| | |||||
* | Moved unsupported commented things to todo.vhd | Rodrigo Alejandro Melo | 2017-11-27 | 4 | -4/+14 |
| | |||||
* | Examples: match case of module name in filename | Larry Doolittle | 2017-11-26 | 1 | -0/+0 |
| | |||||
* | Renamed generic to withselect | Rodrigo Alejandro Melo | 2017-11-26 | 1 | -3/+4 |
| | |||||
* | Renamed while to whileloop | Rodrigo Alejandro Melo | 2017-11-26 | 1 | -4/+3 |
| | |||||
* | Deleted from todo.vhd a testcase that now is supported | Rodrigo Alejandro Melo | 2017-11-26 | 1 | -4/+1 |
| | |||||
* | Renamed gh_fifo_async16_sr to fifo | Rodrigo Alejandro Melo | 2017-11-26 | 1 | -18/+16 |
| | | | | And clean up of trailer tabs and spaces. | ||||
* | Unexcluded partselect | Rodrigo Alejandro Melo | 2017-11-26 | 1 | -2/+1 |
| | |||||
* | Renamed generate to forgen and for to forloop | Rodrigo Alejandro Melo | 2017-11-26 | 2 | -14/+17 |
| | |||||
* | Merge pull request #8 from ldoolitt/exclude | Rodrigo A. Melo | 2017-11-26 | 2 | -3/+7 |
|\ | | | | | Implemented a mechanism to exclude files in the main Makefile | ||||
| * | Renamed .exclude to exclude | Rodrigo Alejandro Melo | 2017-11-25 | 1 | -0/+0 |
| | | |||||
| * | Removed Makefile from examples/.exclude | Rodrigo Alejandro Melo | 2017-11-24 | 1 | -1/+0 |
| | | |||||
| * | Implemented a mechanism to exclude files in the main Makefile | Rodrigo Alejandro Melo | 2017-11-24 | 1 | -0/+5 |
| | | |||||
| * | Simplified iverilog check | Rodrigo Alejandro Melo | 2017-11-24 | 1 | -3/+3 |
| | | |||||
* | | Fixed partselect example | Rodrigo Alejandro Melo | 2017-11-26 | 1 | -2/+2 |
| | | |||||
* | | Correct selection of -: vs. +: | Larry Doolittle | 2017-11-25 | 1 | -1/+3 |
| | | | | | | | | | | Adds new updown field to struct vrange Both cases exercised by examples/partselect.vhd | ||||
* | | Add missing CONVFUNC_1 to grammar | Larry Doolittle | 2017-11-24 | 1 | -1/+1 |
| | | | | | | | | Allows completion of dsp.vhd changes from previous commit | ||||
* | | Fixed dsp.vhd | Rodrigo Alejandro Melo | 2017-11-24 | 1 | -13/+15 |
| | | | | | | | | There is a new problem (commented). | ||||
* | | Turn off debug prints and fix warnings | Larry Doolittle | 2017-11-23 | 2 | -2/+7 |
| | | |||||
* | | First stupid attempt to finish part select | Larry Doolittle | 2017-11-23 | 4 | -5/+12 |
| | | | | | | | | | | No attempt to figure out -: vs. +: Already yields much better results on test files | ||||
* | | Added partselect example | Rodrigo Alejandro Melo | 2017-11-23 | 1 | -0/+30 |
|/ | | | | The conversion to Verilog must be fixed. | ||||
* | Allow second argument to CONVFUNC_2 to be expr | Larry Doolittle | 2017-11-22 | 1 | -1/+1 |
| | | | | | Adds one more shift/reduce conflict. Include test case. | ||||
* | Experimental support of exponentiation | Rodrigo Alejandro Melo | 2017-11-21 | 1 | -1/+8 |
| | |||||
* | Adding support for while loop | Larry Doolittle | 2017-11-20 | 1 | -0/+28 |
| | | | | | Supplied by jeinstei Labelling of the loop is still unsupported. | ||||
* | Align the prototypes for dsp in dsp and genericmap | Larry Doolittle | 2017-11-20 | 2 | -4/+3 |
| | |||||
* | Beginning support for assertions | Larry Doolittle | 2017-11-18 | 1 | -0/+1 |
| | | | | Based on work by jeinstei | ||||
* | Simple fix to genericmap example | Larry Doolittle | 2017-11-18 | 1 | -2/+2 |
| | |||||
* | Modified the Makefile to run GHDl and iVerilog always but only if installed | Rodrigo Alejandro Melo | 2017-11-17 | 1 | -1/+3 |
| | |||||
* | Added (partial) support for to_integer function | Rodrigo Alejandro Melo | 2017-11-16 | 1 | -2/+6 |
| | | | | Added an example that fail to todo.vhd. | ||||
* | Changes on genericmap due to unsupported port assignment | Rodrigo Alejandro Melo | 2017-11-16 | 2 | -5/+24 |
| | | | | This unsupported port assignament and one unsupported type of instantiation were added to todo.vhd. | ||||
* | The resulting files of the GHDL analysis were moved to temp/vhdl | Rodrigo Alejandro Melo | 2017-11-16 | 1 | -2/+5 |
| | |||||
* | Added the special file examples/todo.vhd | Rodrigo Alejandro Melo | 2017-11-16 | 1 | -0/+20 |
| | | | | | | The idea is to put there things that don't work or that could be improved. Is ignored in the main Makefile when target 'translate' is used. The target 'todo' was added to the main Makefile. | ||||
* | Examples were corrected according to GHDL complains | Rodrigo Alejandro Melo | 2017-11-16 | 5 | -8/+10 |
| | |||||
* | Squelch some trailing whitespace | Larry Doolittle | 2017-11-12 | 4 | -17/+16 |
| | |||||
* | Rework some examples so resulting Verilog compiles | Larry Doolittle | 2017-11-10 | 4 | -7/+94 |
| | |||||
* | New make target: verilogcheck | Larry Doolittle | 2017-11-10 | 2 | -0/+23 |
| | | | | | | | Requires iverilog to operate. Scans resulting files in translated_examples directory. This patch includes some simple fixes to reduce the number of errors reported, but there are more that need further investigation. | ||||
* | New rem before END PROCESS | Larry Doolittle | 2017-11-10 | 1 | -0/+32 |
| | | | | With test case! | ||||
* | Experiment with OTHERS logic | Larry Doolittle | 2017-11-09 | 1 | -0/+17 |
| | | | | | | Makes sign extension idiom work in my code base Test case added, doesn't break any others Please test on your code! | ||||
* | Fixes in examples and translated examples to avoid some complains of iVerilog | Rodrigo Alejandro Melo | 2017-02-19 | 4 | -14/+14 |
| | | | | | 'test' was repeated as entity/module name 'config' was used as port name and is a reserved word in Verilog. | ||||
* | Promoted unsupported BASED NUMBER from warning to error | Rodrigo Alejandro Melo | 2017-02-19 | 1 | -1/+1 |
| | | | | | Because the resulting verilog had the unsupported notation BASE#NUMBER#. Moreover, the 'ERROR:' string was added when an error is informed. | ||||
* | Added analysis of examples with GHDL | Rodrigo Alejandro Melo | 2017-02-14 | 13 | -33/+37 |
| | | | | | | | | Some examples were corrected according GHDL complains. Corresponding traslated_examples were modified. Use of synopsys libraries was removed. Translation of gh_fifo_async16_sr.vhd fails (complains about 'unsigned'). The problem was comented. | ||||
* | Added scientific notation supports for integers and floats | Rodrigo Alejandro Melo | 2017-02-09 | 1 | -0/+13 |
| | | | | | Also support was added for real numbers especially thinking in generics. Files called scientific.vhd and scientific.v were added for test. | ||||
* | vhd2vl-2.4 | Larry Doolittle | 2015-09-20 | 1 | -0/+3 |
| | |||||
* | vhd2vl-2.3 | Larry Doolittle | 2015-09-20 | 1 | -0/+205 |
| | |||||
* | vhd2vl-2.2 | Larry Doolittle | 2015-09-20 | 11 | -0/+1314 |