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| author | Larry Doolittle <ldoolitt@recycle.lbl.gov> | 2017-11-09 18:35:03 -0800 |
|---|---|---|
| committer | Larry Doolittle <ldoolitt@recycle.lbl.gov> | 2017-11-09 18:35:03 -0800 |
| commit | e6b83c5bc077ab2060f2df8850d49ca1f7bbc398 (patch) | |
| tree | bba99c725942cb1b2b17062837a3ffc267f10db2 /examples | |
| parent | ed7469300bddd66ea09517aa86b8696165f4b89a (diff) | |
| download | vhdl2vl-e6b83c5bc077ab2060f2df8850d49ca1f7bbc398.tar.gz vhdl2vl-e6b83c5bc077ab2060f2df8850d49ca1f7bbc398.zip | |
Experiment with OTHERS logic
Makes sign extension idiom work in my code base
Test case added, doesn't break any others
Please test on your code!
Diffstat (limited to 'examples')
| -rw-r--r-- | examples/signextend.vhd | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/examples/signextend.vhd b/examples/signextend.vhd new file mode 100644 index 0000000..2f8d9ee --- /dev/null +++ b/examples/signextend.vhd @@ -0,0 +1,17 @@ +library IEEE; +use IEEE.STD_LOGIC_1164.ALL; +use IEEE.STD_LOGIC_UNSIGNED.ALL; + +entity signextend is + port( + i : in std_logic_vector(15 downto 0); + o : out std_logic_vector(31 downto 0) + ); +end entity signextend; + +architecture behavior of signextend is +begin + o(31 downto 24) <= (others => '0'); + o(23 downto 16) <= (others => i(15)); + o(15 downto 0) <= i; +end architecture behavior; |

