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authorLarry Doolittle <ldoolitt@recycle.lbl.gov>2017-11-09 18:35:03 -0800
committerLarry Doolittle <ldoolitt@recycle.lbl.gov>2017-11-09 18:35:03 -0800
commite6b83c5bc077ab2060f2df8850d49ca1f7bbc398 (patch)
treebba99c725942cb1b2b17062837a3ffc267f10db2 /examples
parented7469300bddd66ea09517aa86b8696165f4b89a (diff)
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Experiment with OTHERS logic
Makes sign extension idiom work in my code base Test case added, doesn't break any others Please test on your code!
Diffstat (limited to 'examples')
-rw-r--r--examples/signextend.vhd17
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diff --git a/examples/signextend.vhd b/examples/signextend.vhd
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+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+use IEEE.STD_LOGIC_UNSIGNED.ALL;
+
+entity signextend is
+ port(
+ i : in std_logic_vector(15 downto 0);
+ o : out std_logic_vector(31 downto 0)
+ );
+end entity signextend;
+
+architecture behavior of signextend is
+begin
+ o(31 downto 24) <= (others => '0');
+ o(23 downto 16) <= (others => i(15));
+ o(15 downto 0) <= i;
+end architecture behavior;
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