| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | 2n settings in mca keyed off attributes | Shelton Leung | 2017-03-29 | 1 | -20/+16 |
| * | disable noise window for DD1 HW406577 | Shelton Leung | 2017-03-27 | 1 | -3/+9 |
| * | Read ODT formulas based on CL and CWL | Shelton Leung | 2017-03-23 | 1 | -22/+6 |
| * | tuned down odt wr delay values | Shelton Leung | 2017-03-08 | 1 | -2/+2 |
| * | enable prefetch drop for better MC fairness | Shelton Leung | 2017-03-02 | 1 | -4/+18 |
| * | Updates to initcompiler to support DD2 and cumulus | Richard J. Knight | 2017-02-28 | 2 | -1/+3 |
| * | mc epsilon formula fix | Shelton Leung | 2017-02-21 | 1 | -18/+42 |
| * | Fifo mode inits now dictated by attribute | Shelton Leung | 2017-02-14 | 1 | -0/+10 |
| * | amo cache disabled for dd1 for HW401780 | Shelton Leung | 2017-02-10 | 1 | -1/+5 |
| * | p9.mcs.scom.initfile -- apply workaround for HW400075 in RL=0 only | Joe McGill | 2017-02-07 | 1 | -3/+3 |
| * | workaround for hw400932 atag corruptin in presp | Shelton Leung | 2017-01-30 | 1 | -0/+18 |
| * | dd1 workaround for hw400075 coherency error | Shelton Leung | 2017-01-30 | 1 | -0/+6 |
| * | Adding chip_ec_feature attributes for dd2 build | Ben Gass | 2017-01-24 | 3 | -11/+11 |
| * | added refresh monitoring inits, fixes refresh overrun issue | Shelton Leung | 2017-01-24 | 1 | -0/+10 |
| * | rdtag_dly formulas based on PHY delays | Shelton Leung | 2017-01-24 | 1 | -22/+17 |
| * | fixed code referrencing 2667 to 2666 | Shelton Leung | 2017-01-13 | 1 | -25/+25 |
| * | fixed how odt scoms interpret odt attributes | Shelton Leung | 2017-01-13 | 1 | -33/+96 |
| * | update to write data delay formula | Shelton Leung | 2017-01-13 | 1 | -9/+3 |
| * | Set safe refresh to same as normal refresh | Shelton Leung | 2017-01-04 | 1 | -0/+8 |
| * | new temporary rdtag_dly values | Shelton Leung | 2017-01-03 | 1 | -30/+21 |
| * | scan inits for lab workaround for DI bug HW392781 | Shelton Leung | 2016-12-05 | 1 | -0/+36 |
| * | mca initfile - remove unnecessary dependence on on TRP and TRCD | Shelton Leung | 2016-10-30 | 1 | -51/+51 |
| * | Add RCD parity, clear parity FIR before training | Brian Silver | 2016-10-17 | 1 | -23/+25 |
| * | Change MCA initfile to not divide by 0 if there are no DIMM | Brian Silver | 2016-10-10 | 1 | -2/+10 |
| * | MCA initfile added support for CL != TRP != TRCD, ODT, CID | Shelton Leung | 2016-10-07 | 1 | -0/+155 |
| * | p9.mc.scan.initfile -- adjust HWPERF0 prefetch limit field | Joe McGill | 2016-09-25 | 1 | -8/+8 |
| * | changed scan target to TARGET_TYPE_PROC_CHIP and put MC23 instances as well. | Shelton Leung | 2016-08-24 | 1 | -10/+35 |
| * | added 2nd round of mc inits | Shelton Leung | 2016-08-18 | 3 | -34/+58 |
| * | Removed prefetch limit from scom init since we have it in scan init now. | Shelton Leung | 2016-08-12 | 1 | -5/+0 |
| * | MCA,MCBIST,MCS (all files in one, no 2 part thing anymore) | Shelton Leung | 2016-07-05 | 2 | -48/+160 |
| * | Change MCA initfile to encorporate VBU inits | Brian Silver | 2016-07-01 | 1 | -7/+408 |
| * | updates for memory integration | Joe McGill | 2016-07-01 | 1 | -0/+22 |
| * | MCA,MCBIST,MCS (all files in one, no 2 part thing anymore) | Shelton Leung | 2016-06-16 | 2 | -0/+199 |
