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author | Shelton Leung <sleung@us.ibm.com> | 2016-08-18 10:38:08 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-08-24 18:35:41 -0400 |
commit | 0bda5cc9ed1d3c53f6cef3e3a81189bd7e9ff511 (patch) | |
tree | 140deefaaa901685a0e64d64d1e93426245fe030 /src/import/chips/p9/initfiles | |
parent | 6652a103b87e8ea4596724765aab152b02c4739b (diff) | |
download | talos-hostboot-0bda5cc9ed1d3c53f6cef3e3a81189bd7e9ff511.tar.gz talos-hostboot-0bda5cc9ed1d3c53f6cef3e3a81189bd7e9ff511.zip |
changed scan target to TARGET_TYPE_PROC_CHIP and put MC23 instances as well.
Change-Id: Ic4ac0201fc414f22b8e338e8e748266de120cd31
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28467
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28486
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/initfiles')
-rw-r--r-- | src/import/chips/p9/initfiles/p9.mc.scan.initfile | 45 |
1 files changed, 35 insertions, 10 deletions
diff --git a/src/import/chips/p9/initfiles/p9.mc.scan.initfile b/src/import/chips/p9/initfiles/p9.mc.scan.initfile index 4a9a9cce5..e0ba866ed 100644 --- a/src/import/chips/p9/initfiles/p9.mc.scan.initfile +++ b/src/import/chips/p9/initfiles/p9.mc.scan.initfile @@ -1,14 +1,7 @@ SyntaxVersion = 3 -target_type 0 TARGET_TYPE_MCBIST; +target_type 0 TARGET_TYPE_PROC_CHIP; -# RELIC FROM sample.mc.scan.initfile -# unconditional idial, test binary data input -## TODO: test when side eCMD release available (supporting putspy to mcbist target type) -# ispy MCP.PORT0.WRITE.ASYNC_INJ [when=L] { -# spyv; -# 0b101; -# } ########################## # DD1 WORKAROUNDS @@ -16,6 +9,7 @@ target_type 0 TARGET_TYPE_MCBIST; # FOR DD1 Prefetch Limit needs to be scan init to 0 because SCOM is broken (HW366248) # Always OR-ed with previous value. Essentially we can only set bits, not clear. So we want to scan init to 0. +# these are n1 n3 ispy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] { spyv; 0b000000; @@ -32,9 +26,26 @@ ispy MC01.PORT3.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] { spyv; 0b000000; } +ispy MC23.PORT0.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] { + spyv; + 0b000000; +} +ispy MC23.PORT1.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] { + spyv; + 0b000000; +} +ispy MC23.PORT2.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] { + spyv; + 0b000000; +} +ispy MC23.PORT3.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] { + spyv; + 0b000000; +} # Static hpc_wr/ig_wr CL reservation # Complicated order dependent sequence to do with SCOMs, easier with scans +# these are n1 n3 ispy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF0_WR_RSVD_LOWER_OR_STATIC_LIMIT [when=L] { spyv; 8; @@ -51,5 +62,19 @@ ispy MC01.PORT3.ATCL.CL.CLSCOM.MCPERF0_WR_RSVD_LOWER_OR_STATIC_LIMIT [when=L] { spyv; 8; } - - +ispy MC23.PORT0.ATCL.CL.CLSCOM.MCPERF0_WR_RSVD_LOWER_OR_STATIC_LIMIT [when=L] { + spyv; + 8; +} +ispy MC23.PORT1.ATCL.CL.CLSCOM.MCPERF0_WR_RSVD_LOWER_OR_STATIC_LIMIT [when=L] { + spyv; + 8; +} +ispy MC23.PORT2.ATCL.CL.CLSCOM.MCPERF0_WR_RSVD_LOWER_OR_STATIC_LIMIT [when=L] { + spyv; + 8; +} +ispy MC23.PORT3.ATCL.CL.CLSCOM.MCPERF0_WR_RSVD_LOWER_OR_STATIC_LIMIT [when=L] { + spyv; + 8; +} |