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author | Shelton Leung <sleung@us.ibm.com> | 2017-02-24 12:20:02 -0600 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-03-02 09:00:21 -0500 |
commit | ad4305c9a199511330c71a737ebe267c88da4e14 (patch) | |
tree | 2bd93699e223fa459c55ccaaad5c9bd340bccfe4 /src/import/chips/p9/initfiles | |
parent | 420ca4a8abaff4aac15614c4dddc0b37f6c239ac (diff) | |
download | talos-hostboot-ad4305c9a199511330c71a737ebe267c88da4e14.tar.gz talos-hostboot-ad4305c9a199511330c71a737ebe267c88da4e14.zip |
enable prefetch drop for better MC fairness
Change-Id: I0fee2fe19b703e090ad2364a2a38dac31079b38f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37010
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37101
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/initfiles')
-rw-r--r-- | src/import/chips/p9/initfiles/p9.mcs.scom.initfile | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/src/import/chips/p9/initfiles/p9.mcs.scom.initfile b/src/import/chips/p9/initfiles/p9.mcs.scom.initfile index 0db3bf7a5..ae7477f64 100644 --- a/src/import/chips/p9/initfiles/p9.mcs.scom.initfile +++ b/src/import/chips/p9/initfiles/p9.mcs.scom.initfile @@ -76,26 +76,40 @@ target_type 2 TARGET_TYPE_PROC_CHIP; ########################## # If cache scope prediciton logic is active, must disable fp_m bit, so fp ops will go fetch 128 bytes (for potential mdi update) -espy MC01.PBI01.SCOMFIR.MCMODE1_DISABLE_FP_M_BIT [when=S] { +espy MC01.PBI01.SCOMFIR.MCMODE1_DISABLE_FP_M_BIT [when=S] { spyv; ON; } # HW376110 -ispy MC01.PBI01.SCOMFIR.MCPERF1_MERGE_CAPACITY_LIMIT [when=S && ATTR_CHIP_EC_FEATURE_HW376110] { +ispy MC01.PBI01.SCOMFIR.MCPERF1_MERGE_CAPACITY_LIMIT [when=S && ATTR_CHIP_EC_FEATURE_HW376110] { spyv; 0b0111; } # Turns off SRQ pf drop -ispy MC01.PBI01.SCOMFIR.MCPERF1_ENABLE_PF_DROP_SRQ [when=S] { +ispy MC01.PBI01.SCOMFIR.MCPERF1_ENABLE_PF_DROP_SRQ [when=S] { spyv; 0; } # HW400075 Always set MDI to 1 for ttypes cp_me and cp_m -ispy MC01.PBI01.SCOMFIR.MCMODE2_DISABLE_MDI0 [when=S && ATTR_CHIP_EC_FEATURE_HW40075] { +ispy MC01.PBI01.SCOMFIR.MCMODE2_DISABLE_MDI0 [when=S && ATTR_CHIP_EC_FEATURE_HW400075] { spyv, expr; 0b0001100000000, (TGT1.ATTR_RISK_LEVEL == 0); } +# HW398139 Enable commandlist prefetch drop for better arbitration +# Prefetch drop references an internal counter (6 by default - this is max value) to determine +# when a prefetch gets dropped. DROP_CNT_THRESH determines the rate the counter decrements (in units +# of 4 nest clocks) -- here, 8 * 4 nclks = 32 nclks, 32 nclks * 6 counts => takes 192 nest clocks +# to drop a prefetch. This dial may need to be tuned for performance. +espy MC01.PBI01.SCOMFIR.MCPERF1_ENABLE_PF_DROP_CMDLIST [when=S && ATTR_CHIP_EC_FEATURE_HW398139] { + spyv; + ON; +} + +ispy MC01.PBI01.SCOMFIR.MCPERF1_PF_DROP_CNT_THRESH [when=S && ATTR_CHIP_EC_FEATURE_HW398139] { + spyv; + 8; +} |