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author | Shelton Leung <sleung@us.ibm.com> | 2016-08-05 15:22:57 -0500 |
---|---|---|
committer | Stephen M. Cprek <smcprek@us.ibm.com> | 2016-08-18 15:12:25 -0400 |
commit | 0cf8b613c8c1e89b053e320fb8119979553aebd3 (patch) | |
tree | 48b775c8d93d5c03c56690d535c17784421ae010 /src/import/chips/p9/initfiles | |
parent | 22f871c5f297dbfadfc0cade037937c0783fef7a (diff) | |
download | talos-hostboot-0cf8b613c8c1e89b053e320fb8119979553aebd3.tar.gz talos-hostboot-0cf8b613c8c1e89b053e320fb8119979553aebd3.zip |
added 2nd round of mc inits
Change-Id: I46729be578c3e9e1dddbee5fec0467e4aae95813
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28064
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28067
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/initfiles')
-rw-r--r-- | src/import/chips/p9/initfiles/p9.mc.scan.initfile | 21 | ||||
-rw-r--r-- | src/import/chips/p9/initfiles/p9.mca.scom.initfile | 47 | ||||
-rw-r--r-- | src/import/chips/p9/initfiles/p9.mcs.scom.initfile | 24 |
3 files changed, 58 insertions, 34 deletions
diff --git a/src/import/chips/p9/initfiles/p9.mc.scan.initfile b/src/import/chips/p9/initfiles/p9.mc.scan.initfile index 92e34a968..4a9a9cce5 100644 --- a/src/import/chips/p9/initfiles/p9.mc.scan.initfile +++ b/src/import/chips/p9/initfiles/p9.mc.scan.initfile @@ -11,7 +11,7 @@ target_type 0 TARGET_TYPE_MCBIST; # } ########################## -# MC TEAM DICTATED INITS # +# DD1 WORKAROUNDS ########################## # FOR DD1 Prefetch Limit needs to be scan init to 0 because SCOM is broken (HW366248) @@ -33,4 +33,23 @@ ispy MC01.PORT3.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] { 0b000000; } +# Static hpc_wr/ig_wr CL reservation +# Complicated order dependent sequence to do with SCOMs, easier with scans +ispy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF0_WR_RSVD_LOWER_OR_STATIC_LIMIT [when=L] { + spyv; + 8; +} +ispy MC01.PORT1.ATCL.CL.CLSCOM.MCPERF0_WR_RSVD_LOWER_OR_STATIC_LIMIT [when=L] { + spyv; + 8; +} +ispy MC01.PORT2.ATCL.CL.CLSCOM.MCPERF0_WR_RSVD_LOWER_OR_STATIC_LIMIT [when=L] { + spyv; + 8; +} +ispy MC01.PORT3.ATCL.CL.CLSCOM.MCPERF0_WR_RSVD_LOWER_OR_STATIC_LIMIT [when=L] { + spyv; + 8; +} + diff --git a/src/import/chips/p9/initfiles/p9.mca.scom.initfile b/src/import/chips/p9/initfiles/p9.mca.scom.initfile index 55ec941c8..3b2ec7707 100644 --- a/src/import/chips/p9/initfiles/p9.mca.scom.initfile +++ b/src/import/chips/p9/initfiles/p9.mca.scom.initfile @@ -39,27 +39,27 @@ #-- REFERENCES FOR FILE #--****************************************************************************** # Files used to check what target type attributes are -# /gsa/ausgsa/home/s/l/sleung/ekb/ekb/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml -# /gsa/ausgsa/home/s/l/sleung/ekb/ekb/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml +# /afs/awd/projects/eclipz/pz6/usr/sleung/ekb/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml +# /afs/awd/projects/eclipz/pz6/usr/sleung/ekb/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml # Example: # <id>ATTR_EFF_NUM_RANKS_PER_DIMM</id> # <targetType>TARGET_TYPE_MCS</targetType> # File used to see if attribute is 1D or 2D array -# /gsa/ausgsa/home/s/l/sleung/ekb/ekb/output/gen/attribute_ids.H +# /afs/awd/projects/eclipz/pz6/usr/sleung/ekb/output/gen/attribute_ids.H # Example: # typedef uint8_t ATTR_EFF_DIMM_TYPE_Type[2][2]; # File for finding correct spydef name # 1st find the spydef file this ekb build is looking at by finding SPYDEF_FILE_LOCATION in file below -# /gsa/ausgsa/home/s/l/sleung/ekb/ekb/tools/ifCompiler/scan_procedures.mk +# /afs/awd/projects/eclipz/pz6/usr/sleung/ekb/tools/ifCompiler/scan_procedures.mk # 2nd open *.spydef in that dir and search for spy names -# /afs/awd/projects/eclipz/lab/p9/vbu_models/n10_e9050_tp046_ec150u01a_soa_sc_u138_01/edc/*.spydef +# /afs/awd/projects/eclipz/lab/p9/vbu_models/n10_e9067_tp058_ec163uXXa_soa_sq_u190_01/edc/*.spydef # (File comes from actually building a vbu file and looking at the spydef) # Example: # idial MCP.PORT1.SRQ.PC.MBAREF0Q_CFG_TRFC { # Wrapper file calling this -# /gsa/ausgsa/home/s/l/sleung/ekb/ekb/chips/p9/procedures/hwp/memory/p9_mss_scominit.C +# /afs/awd/projects/eclipz/pz6/usr/sleung/ekb/chips/p9/procedures/hwp/memory/p9_mss_scominit.C # Output file generated -# /gsa/ausgsa/home/s/l/sleung/ekb/ekb/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C +# /afs/awd/projects/eclipz/pz6/usr/sleung/ekb/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C # # COMMON DEBUG # -debug5.16.i6.d @@ -434,19 +434,17 @@ ispy MCP.PORT0.SRQ.PC.MBASTR0Q_CFG_TXSDLL [when=S] { #################################################### -# Force clock enable high DD1 Periodics Issue +# DD1 WORKAROUNDS #################################################### +# Force clock enable high DD1 Periodics Issue + espy MCP.PORT0.SRQ.MBA_FARB0Q_CFG_OE_ALWAYS_ON [when=S]{ spyv; ON; } - - -#################################################### -# MCS SCOMS MOVED HERE (USING BEN GASS DLL OVERRIDE) -#################################################### +# Epsilon Settings per Power Bus Spreadsheet ispy MC01.PORT0.ATCL.CL.CLSCOM.MCEPSQ_JITTER_EPSILON [when=S] { spyv; @@ -478,17 +476,32 @@ ispy MC01.PORT0.ATCL.CL.CLSCOM.MCEPSQ_VECTOR_GROUP_EPSILON [when=S] { SYS.ATTR_PROC_EPS_READ_CYCLES_T2 / 4; } -# MC TEAM DICTATED INITS # +# HW366164 - SRQ Fullness Control -# HW366164 ispy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF2_SQ_LFSR_CNTL [when=S] { spyv; 0b0100; } +# Number of RMW buffers available -espy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF2_EN_ALT_CR [when=S] { +ispy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF2_NUM_RMW_BUF [when=S] { spyv; - OFF; + 0b11100; } +# All rctrl ops through tag FIFO (bit 0) +# Serialize CMDLIST pf drop through rctrl (bit 1) +# (bit 0 keep at 0) +ispy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF2_RCTRL_CONFIG [when=S] { + spyv; + 0b110; +} + +# Max 24 64-byte read buffers (HW375534) +ispy MCP.PORT0.SRQ.MBA_RRQ0Q_CFG_RDBUFF_CAPACITY_LIMIT [when=S] { + spyv; + 0b011000; +} + + diff --git a/src/import/chips/p9/initfiles/p9.mcs.scom.initfile b/src/import/chips/p9/initfiles/p9.mcs.scom.initfile index f6a3639be..f1fb2db0b 100644 --- a/src/import/chips/p9/initfiles/p9.mcs.scom.initfile +++ b/src/import/chips/p9/initfiles/p9.mcs.scom.initfile @@ -71,9 +71,10 @@ target_type 0 TARGET_TYPE_MCS; ########################## -# MC TEAM DICTATED INITS # +# DD1 WORKAROUNDS ########################## +# If cache scope prediciton logic is active, must disable fp_m bit, so fp ops will go fetch 128 bytes (for potential mdi update) espy MC01.PBI01.SCOMFIR.MCMODE1_DISABLE_FP_M_BIT [when=S] { spyv; ON; @@ -85,18 +86,9 @@ ispy MC01.PBI01.SCOMFIR.MCPERF1_MERGE_CAPACITY_LIMIT [when=S] { 0b0111; } -# MOVED MC01.PORT... TO MCA PER BEN GASS'S DLL OVERRIDE -# -#ispy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF2_SQ_LFSR_CNTL [when=S] { -# spyv; -# 0b0100; -# -#espy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF2_EN_ALT_CR [when=S] { -# spyv; -# OFF; -#} -# -#ispy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=S] { -# spyv; -# 0b000000; -#} +# Turns off SRQ pf drop +ispy MC01.PBI01.SCOMFIR.MCPERF1_ENABLE_PF_DROP_SRQ [when=S] { + spyv; + 0; +} + |