diff options
| author | Joe McGill <jmcgill@us.ibm.com> | 2017-01-30 11:42:13 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-02-07 11:33:44 -0500 |
| commit | 32f4cf46ecdab1df5e80bc13f46bd30bd67fc3f5 (patch) | |
| tree | f26a25c5570cba1b29bca61a7dc0df4c1563a649 /src/import/chips/p9/initfiles | |
| parent | bb1d5af12d3c243863b6cbfef2d0b28bd9650b5b (diff) | |
| download | talos-hostboot-32f4cf46ecdab1df5e80bc13f46bd30bd67fc3f5.tar.gz talos-hostboot-32f4cf46ecdab1df5e80bc13f46bd30bd67fc3f5.zip | |
p9.mcs.scom.initfile -- apply workaround for HW400075 in RL=0 only
Change-Id: Id48ff843c1070d5694aa65fb7be5d49f51d67c50
CQ: HW400075
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35588
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35626
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/initfiles')
| -rw-r--r-- | src/import/chips/p9/initfiles/p9.mcs.scom.initfile | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/import/chips/p9/initfiles/p9.mcs.scom.initfile b/src/import/chips/p9/initfiles/p9.mcs.scom.initfile index 59aa6e5ab..12cbe4a6f 100644 --- a/src/import/chips/p9/initfiles/p9.mcs.scom.initfile +++ b/src/import/chips/p9/initfiles/p9.mcs.scom.initfile @@ -50,7 +50,7 @@ SyntaxVersion = 3 target_type 0 TARGET_TYPE_MCS; - +target_type 1 TARGET_TYPE_SYSTEM; #--****************************************************************************** @@ -94,7 +94,7 @@ ispy MC01.PBI01.SCOMFIR.MCPERF1_ENABLE_PF_DROP_SRQ [when=S] { # HW400075 Always set MDI to 1 for ttypes cp_me and cp_m ispy MC01.PBI01.SCOMFIR.MCMODE2_DISABLE_MDI0 [when=S && ATTR_CHIP_EC_FEATURE_HW40075] { - spyv; - 0b0001100000000; + spyv, expr; + 0b0001100000000, (TGT1.ATTR_RISK_LEVEL == 0); } |
