Adding chip_ec_feature attributes for dd2 build

Resulting dd10 hw_image file matches the one generated
from initfiles in master.

Grub boots with resulting image and procedures.

Change-Id: I2257448a7dcdb6be44da6196da847cca8ad4077d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34736
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34865
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

3 files changed, 11 insertions, 11 deletions

diff --git a/src/import/chips/p9/initfiles/p9.mc.scan.initfile b/src/import/chips/p9/initfiles/p9.mc.scan.initfile
index d93e92108..9e483d097 100644
--- a/src/import/chips/p9/initfiles/p9.mc.scan.initfile
+++ b/src/import/chips/p9/initfiles/p9.mc.scan.initfile
@@ -10,35 +10,35 @@ target_type 0 TARGET_TYPE_PROC_CHIP;
 # FOR DD1 Prefetch Limit needs to be scan init to 0 because SCOM is broken (HW366248)
 #      Always OR-ed with previous value. Essentially we can only set bits, not clear. So we want to scan init to 0.
 #      these are n1 n3
-ispy  MC01.PORT0.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] {
+ispy  MC01.PORT0.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L && ATTR_CHIP_EC_FEATURE_HW366248] {
   spyv;
   0b111111;
 }
-ispy  MC01.PORT1.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] {
+ispy  MC01.PORT1.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L && ATTR_CHIP_EC_FEATURE_HW366248] {
   spyv;
   0b111111;
 }
-ispy  MC01.PORT2.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] {
+ispy  MC01.PORT2.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L && ATTR_CHIP_EC_FEATURE_HW366248] {
   spyv;
   0b111111;
 }
-ispy  MC01.PORT3.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] {
+ispy  MC01.PORT3.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L && ATTR_CHIP_EC_FEATURE_HW366248] {
   spyv;
   0b111111;
 }
-ispy  MC23.PORT0.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] {
+ispy  MC23.PORT0.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L && ATTR_CHIP_EC_FEATURE_HW366248] {
   spyv;
   0b111111;
 }
-ispy  MC23.PORT1.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] {
+ispy  MC23.PORT1.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L && ATTR_CHIP_EC_FEATURE_HW366248] {
   spyv;
   0b111111;
 }
-ispy  MC23.PORT2.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] {
+ispy  MC23.PORT2.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L && ATTR_CHIP_EC_FEATURE_HW366248] {
   spyv;
   0b111111;
 }
-ispy  MC23.PORT3.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L] {
+ispy  MC23.PORT3.ATCL.CL.CLSCOM.MCPERF0_PREFETCH_LIMIT [when=L && ATTR_CHIP_EC_FEATURE_HW366248] {
   spyv;
   0b111111;
 }
diff --git a/src/import/chips/p9/initfiles/p9.mca.scom.initfile b/src/import/chips/p9/initfiles/p9.mca.scom.initfile
index 7560f08b5..c3b5a0bf3 100644
--- a/src/import/chips/p9/initfiles/p9.mca.scom.initfile
+++ b/src/import/chips/p9/initfiles/p9.mca.scom.initfile
@@ -704,7 +704,7 @@ ispy  MC01.PORT0.ATCL.CL.CLSCOM.MCEPSQ_VECTOR_GROUP_EPSILON [when=S] {
 
 # HW366164 - SRQ Fullness Control
 
-ispy  MC01.PORT0.ATCL.CL.CLSCOM.MCPERF2_SQ_LFSR_CNTL [when=S] {
+ispy  MC01.PORT0.ATCL.CL.CLSCOM.MCPERF2_SQ_LFSR_CNTL [when=S && ATTR_CHIP_EC_FEATURE_HW366164] {
   spyv;
   0b0100;
 }
@@ -725,7 +725,7 @@ ispy  MC01.PORT0.ATCL.CL.CLSCOM.MCPERF2_RCTRL_CONFIG [when=S] {
 }
 
 # Max 24 64-byte read buffers (HW375534)
-ispy  MCP.PORT0.SRQ.MBA_RRQ0Q_CFG_RDBUFF_CAPACITY_LIMIT [when=S] {
+ispy  MCP.PORT0.SRQ.MBA_RRQ0Q_CFG_RDBUFF_CAPACITY_LIMIT [when=S && ATTR_CHIP_EC_FEATURE_HW375534] {
   spyv;
   0b011000;
 }
diff --git a/src/import/chips/p9/initfiles/p9.mcs.scom.initfile b/src/import/chips/p9/initfiles/p9.mcs.scom.initfile
index f1fb2db0b..38bfd8b99 100644
--- a/src/import/chips/p9/initfiles/p9.mcs.scom.initfile
+++ b/src/import/chips/p9/initfiles/p9.mcs.scom.initfile
@@ -81,7 +81,7 @@ espy  MC01.PBI01.SCOMFIR.MCMODE1_DISABLE_FP_M_BIT [when=S] {
 }
 
 # HW376110
-ispy  MC01.PBI01.SCOMFIR.MCPERF1_MERGE_CAPACITY_LIMIT [when=S] {
+ispy  MC01.PBI01.SCOMFIR.MCPERF1_MERGE_CAPACITY_LIMIT [when=S && ATTR_CHIP_EC_FEATURE_HW376110] {
   spyv;
   0b0111;
 }