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* Fix build failure on GCC8Raptor Engineering Development Team2019-04-191-0/+1
| | | | | | | | | When upgrading to GCC8, an .eh_frame section is automatically added. This consumes too much space in the relatively small OCC address map, leading to compilation failure. Pass -fno-asynchronous-unwind-tables to GCC to disable .eh_frame section generation.
* NVDIMM procedure updateChris Cain2018-10-291-14/+41
| | | | | | | | | | | | | | | - stop mcbist - reduce delay times to 0 - disable min power domain reduction Misc cleanup: skip i2c lock release on non-Nimbus systems Change-Id: If1789a562df1dca245b1eb63f5355924a042d73d RTC: 173789 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67311 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Assert ddr_resetn during EPOW on NVDIMMsChris Cain2018-10-041-13/+120
| | | | | | | | | | Change-Id: I34d3c1a6f0c2f0a1fb95a1fb77af00c176b4e000 RTC: 173789 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66827 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Tested-by: Christopher J. Cain <cjcain@us.ibm.com>
* Support for NVDIMMsChris Cain2018-09-264-7/+132
| | | | | | | | | | Change-Id: I8ccf44287bc72a73b16662ba29b71e731c70b30e RTC:173789 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65917 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Memory:MPV:STC920:Zeppelin: OCC held in reset after a channel checkstopDouglas Gilbert2018-08-077-78/+321
| | | | | | | | | Change-Id: I0311ea1a8ba3051ad8e2103deba2cef84f12109b CQ:sw439732 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63705 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* Increase GPE1 Stack SizeWilliam Bryan2018-07-061-2/+2
| | | | | | | | Change-Id: I264e2367ecde7172436bf49c38aa9c40a5b0c9b2 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61827 Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* 24x7: Added Alink PMU & fix for defect SW430218Sumit Kumar2018-05-312-13/+161
| | | | | | | | Change-Id: Ia7a1a3706ebaf2bf300e3f875bdbfde0621c83ea Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59632 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Centaur SYNC required after changing throttleDouglas Gilbert2018-05-072-43/+105
| | | | | | | | | Change-Id: I8bccc2a0971728d8d2582ba678de166c2591557a CQ: SW426949 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58053 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* 24x7 gpe1: Added version structureSumit Kumar2018-05-022-1880/+1958
| | | | | | | | Change-Id: I2d8049f4b0230464a30b8c73b811e7c776dfa537 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58006 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* OCC Centaur: Check for channel checkstopDouglas Gilbert2018-04-203-112/+251
| | | | | | | | | | Change-Id: I2df9675d655b0391b249e49f7fc036788268e36c RTC: 191164 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57280 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Fix compile issue in op-build environmentWilliam Bryan2018-04-101-51/+2
| | | | | | | | | | Change-Id: I8a53d3b6b313ff5ac214bd62919e2f04989305a3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57009 Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* OCC Centaur disable deadman timer and clean up codeDoug Gilbert2018-04-042-184/+23
| | | | | | | | | Change-Id: I7d79dd2112de2e28f9b748add6626b231ff236bb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56660 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* P9 Centaur sensor supportDoug Gilbert2018-03-288-15/+1276
| | | | | | | | | Change-Id: Ia84bc7532482ca314c26bd0bb5bf48ad6ee9c410 RTC: 163359 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54989 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* Memory Throttle SensorsWilliam Bryan2018-03-271-10/+44
| | | | | | | | | | | RTC:131184 Change-Id: I2582a1eb9d599f700182f17047cc95accad03725 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51407 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* nvlink,xlink,phb fixesSooraj Nair2018-01-092-251/+438
| | | | | | | | Change-Id: Ied42068958a941cfac9973c889a080865e37d0e0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51445 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* APSS Reset SupportDoug Gilbert2017-12-181-1/+1
| | | | | | | | | | Change-Id: I23dd10a7bc78841ecd4382e8ac8667afbb7c2ddd RTC: 163601 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49871 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Permanent fix for SW399904(fixed nvlink/uav)Sooraj Nair2017-10-272-41/+68
| | | | | | | | | | | Hostboot HWP for UAV updation is fixed so Removing workaround. Also fixed NVLINK address and configs. Change-Id: Ia85271aff13a9bc2e789223570b8c112b03ed114 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48869 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Enable hardware GPU power brakeDoug Gilbert2017-10-103-2/+72
| | | | | | | | | | Change-Id: I39ae6205cef6ae06cacc0eb2c8a0a4288b8081c8 RTC: 179617 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46800 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* google fix 09/28Sooraj Nair2017-09-292-1644/+1714
| | | | | | | | | | | New cofiguration that prevents PB events and MC events interfering. Change-Id: Ie170265da97390d86871c346205016135cc81499 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46914 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* temporary fix for sw399904Sooraj Nair2017-09-062-0/+7
| | | | | | | | Change-Id: I369d5543c93150545de0dc05bb39f7f41b077208 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45584 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Enable safe mode memory throttlingmbroyles2017-08-292-19/+115
| | | | | | | | | | Change-Id: I62cf1be6a24e02a2cd59b75416d26596a4f2f81d RTC: 169887 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45169 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* 405 Side GPU Core Temp CollectionWilliam Bryan2017-08-251-0/+5
| | | | | | | | | Change-Id: Ia1b10f5208c49ba168dcf338f0cbeb2c4ab46971 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44982 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Move I2C info to commonWilliam Bryan2017-08-244-54/+7
| | | | | | | | | Change-Id: I64c0213d7320b484d165fe0094e2e0286f730957 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44690 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* Delay DIMM collection for 60 seconds to prevent I2C bus contention with OPALChris Cain2017-08-163-2/+6
| | | | | | | | | Change-Id: Ia296230333cce7be3e2db385fc2293f6374ef104 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44693 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Amended 24x7 code- 7/11/2017 config,500us ticSooraj Nair2017-08-163-32/+1558
| | | | | | | | | | | | | Change-Id: I6a016fc0158f4210f0e944dfcf770f3b87837c2e changes to accomodate occ tic duration change from 250us to 500us assumes runtime of 50us per tic also added ALINK3 mask in header to reflect UAV change Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43130 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Update divisor for I2C resets to match what is used reading tempsChris Cain2017-08-151-1/+4
| | | | | | | | Change-Id: I89b082eea7d23327c519ddeb6a9d473ec35341cf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44644 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Initial 405 GPU supportmbroyles2017-08-141-1/+25
| | | | | | | Change-Id: I6e957ca1aa643d257274e99957df5b15ac8c889b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44254 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Set MSR before DIMM temp task to avoid machine checkWilliam Bryan2017-08-031-1/+21
| | | | | | | | | | Change-Id: I95ce4cccae9fe315570cd2bd7347c370781dc745 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44178 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Add pointers to GPE trace buffersWilliam Bryan2017-07-281-0/+7
| | | | | | | | | Change-Id: Ia313e9d7bddde3b61b8f7fc2319e4583843b9549 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43284 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Use std=gnu89, the gcc 4.8 defaultWilliam Bryan2017-06-301-2/+4
| | | | | | | | | | RTC:176497 Change-Id: Ibac4a602dd0436143a901edaeb13b6a313c5fbba Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42653 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Memory Power Control when entering and exiting IPS (Idle Power Save)Wael El-Essawy2017-05-105-17/+281
| | | | | | | | | | | | | | | memory power control settings for IPS/default modes - as defined by memory config data packet version 0x21 - are applied to memory power control registers of all configured ports whenever the OCC enters/exits IPS, respectively. Change-Id: I56514bb8cbab80c6d4877edc74db96f3b011e523 RTC: 165546 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38294 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* PGPE init updatesChris Cain2017-04-131-0/+1
| | | | | | | | | | Change-Id: I0140184371619983fb38b27199f241efe7f30f16 RTC: 169886 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37770 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Changes For P9 EnablementWilliam Bryan2017-02-151-2/+2
| | | | | | | | | | | Change-Id: I37e8174bcc6e99f602a66cff077ef41ad889b19c RTC:165351 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34949 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* GPE Nest Frequency & Amester Name ChangesWilliam Bryan2017-02-141-2/+15
| | | | | | | | | | Change-Id: I46ee2502dcfd532b6ff30a32b0a645aecc285f21 RTC:168527 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36293 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Infrastructure for 24x7 data collectionmbroyles2017-02-143-8/+125
| | | | | | | | | | Change-Id: I16277d8290f65ba489da1421783f3705be7281f4 RTC: 168729 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36043 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Fix DIMM temperature readsChris Cain2017-02-144-23/+14
| | | | | | | | | | | | | FIFO4 register requires a 4 byte read or will hang. OCC will request 4 byte read, but only look at first 2 for temperature. FIFO register can only read one byte per request which is less efficient. Change-Id: Ia0bbbc70f5b7de76f1bea64279b2ff7dd5b5a861 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35974 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* dcom/ thread/ rtls/ TODO clean upAndres Lugo-Reyes2016-12-151-1/+1
| | | | | | | | | | | | | Also moved files common to occ_405/, occ_gpe0/, occ_gpe1/, etc, to a new common directory to keep src/ clean Change-Id: Ib45d70d048a135832592953c955a325d20fa19ae RTC: 163363 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33640 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Update DIMM i2c divisor to increase clock rateChris Cain2016-12-121-1/+4
| | | | | | | | | | | | | | | In legacy mode, a divisor of 0x0049 will give approx freq of 391kHZ This value will allow margin for clock variation. For reference: 0x0177 is approx 77kHz 0x0048 is approx 396kHz 0x0049 is approx 391kHz Change-Id: I7ff68f414f5afff8ca6d96f51c0b2f25eeb0841f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33694 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Implement task_poke_watchdogsWael El-Essawy2016-11-032-2/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | task_poke_watchdogs() should be called every 2ms (ticks 1 and 9) on both master and slaves while in observation and active state and do the following: 1. Every time called: Enable/Reset the OCC heartbeat: done by a write to OCB OCC Heartbeat Register (set count to 8ms) 2. Every time called: Reset memory deadman timer for 1 MCA (skip if not present and just wait until next call to check next MCA to keep same timing of reset per MCA regardless of # present) Resetting the deadman is done by reading one of the memory performance counters, use one at SCOM offset 0x13C. NOTE: Will take 16ms (8 MCAs x 2ms) to reset all memory timers, this is fine since the shortest time the deadman timeout can be configured to is 28ms 3. Every 4ms (on tick 1 only) : Verify PGPE is still functional by reading PGPE Beacon from SRAM if after 8ms (2 consecutive checks) there is no change to the PGPE Beacon count then log an error and request reset. In addition, this commit adds entries for the PGPE image header and shared SRAM in the TLB, and partially reads PGPE image header parameters. Change-Id: I9906102b3349506612d55c57e9f5c28441eaeb39 RTC: 154960 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31916 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Changes for GCC 4.9 and OPWilliam Bryan2016-10-241-9/+5
| | | | | | | | Change-Id: I95ddff4b290fcf3eab617a674afc489698c78a1e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31563 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Sensor List Checking & Make ImprovementsWilliam Bryan2016-10-142-3/+30
| | | | | | | | | | Change-Id: Id75021aeeb75c8d63b85e8a80bf09646b8bcf215 RTC:160341 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30752 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* SSX Runtime Environment CheckWilliam Bryan2016-10-111-1/+4
| | | | | | | | | | | RTC: 139829 Change-Id: Ic43ab936fd9d9b0d41270bbea50cd3969d9f8432 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30063 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Enable FW Timing SensorsWael El-Essawy2016-09-234-2/+65
| | | | | | | | | | | Enable scheduling of the GPE NOP task to do GPE timings and verify all sensors being updated in amec_update_fw_sensors() are being populated correctly. Change-Id: I623dd7518be9a8736e601c7d2fa748097a4d773a RTC: 141299 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29849 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Memory Temperature Control Loop (memory throttling)Wael El-Essawy2016-09-165-3/+127
| | | | | | | | | | | | * Memory throttling due to over temp * Throttle when reach timeout getting new temperature readings * Log error for temperature exceeding ERROR threshold Change-Id: I089c88aadba84e7296ad87b8cb87fa8c045ff912 RTC: 131188 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28933 Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Tested-by: Wael El-Essawy <welessa@us.ibm.com>
* Update build process for OpenPOWERWilliam Bryan2016-08-262-8/+10
| | | | | | | | | | Change-Id: I0852869bdc9d527c54112de7223b6e95111c750a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28741 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Remove IBM Confidential DisclaimersWilliam Bryan2016-08-023-6/+50
| | | | | | | | Change-Id: Ie3dcd5b6cee3e6b191cf136d30af634c9966318e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27718 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Delete unused files, update PK, and use new compilersWilliam Bryan2016-07-293-46/+77
| | | | | | | | Change-Id: I9e4951a2cebd204d1ea752c63e3f2b532ad3a2db Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27465 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Build full OCC image and update build processWilliam Bryan2016-05-043-13/+69
| | | | | | | | Change-Id: I8e6d716a48f30021b653e850c74deb7526cfe293 RTC:133001 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22155 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Implement I2C locking with hostChris Cain2016-03-012-18/+18
| | | | | | | | | | Change-Id: I9e99e799e0df442bebef473360ca87d564f5ddaf RTC: 140545 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/12898 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Implement code to read DIMM temperaturesChris Cain2016-01-277-22/+853
| | | | | | | | | | Change-Id: I98fc83ab1c78bd40241fe6e47a9ddeae24f78c38 RTC: 140093 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22770 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher Cain <cjcain@us.ibm.com>
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