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authorDouglas Gilbert <dgilbert@us.ibm.com>2018-04-30 15:00:15 -0500
committerMartha Broyles <mbroyles@us.ibm.com>2018-05-07 12:35:12 -0400
commit9e004972550ddbe98efbe8c1803bb7ef86aa4f1d (patch)
tree9cabbb635a4d41a52a9bb86e8316a87bf69a4c38 /src/occ_gpe1
parentf741c41933c8835c5de75abe8402e3c5d13d417e (diff)
downloadtalos-occ-9e004972550ddbe98efbe8c1803bb7ef86aa4f1d.tar.gz
talos-occ-9e004972550ddbe98efbe8c1803bb7ef86aa4f1d.zip
Centaur SYNC required after changing throttle
Change-Id: I8bccc2a0971728d8d2582ba678de166c2591557a CQ: SW426949 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58053 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Diffstat (limited to 'src/occ_gpe1')
-rw-r--r--src/occ_gpe1/gpe_centaur_configuration.c52
-rw-r--r--src/occ_gpe1/gpe_centaur_scom.c96
2 files changed, 105 insertions, 43 deletions
diff --git a/src/occ_gpe1/gpe_centaur_configuration.c b/src/occ_gpe1/gpe_centaur_configuration.c
index fdf9927..b9866bb 100644
--- a/src/occ_gpe1/gpe_centaur_configuration.c
+++ b/src/occ_gpe1/gpe_centaur_configuration.c
@@ -50,6 +50,14 @@ const uint32_t MCFGPR[OCCHW_NCENTAUR] =
MCS_3_MCRSVDF
};
+const uint32_t MCSYNC[OCCHW_NCENTAUR/2] =
+{
+ MCS_0_MCSYNC,
+ MCS_1_MCSYNC,
+ MCS_2_MCSYNC,
+ MCS_3_MCSYNC
+};
+
const uint32_t MCCHIFIR[OCCHW_NCENTAUR] =
{
MCP_CHAN0_CHI_FIR,
@@ -168,6 +176,7 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
uint64_t bar = 0;
uint64_t mask = 0;
uint64_t* ptr = (uint64_t*)o_config;
+ int designated_sync = -1;
// Prevent unwanted interrupts from scom errors
const uint32_t orig_msr = mfmsr() & MSR_SEM;
@@ -220,8 +229,6 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
for (i = 0; i < OCCHW_NCENTAUR; ++i)
{
- uint64_t val64;
-
// check for channel checkstop
rc = check_channel_chkstp(i);
if (rc)
@@ -244,15 +251,6 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
continue;
}
- // TODO RTC 190643 ENGD work-around until change gets pushed up into a driver.
- // Turn on bit 25 in mode0 regs. They should all have the same value
- rc = getscom_abs(0x05010811, &val64);
- val64 |= 0x0000004000000000ull;
- rc = putscom_abs(0x05010811, val64);
- rc = putscom_abs(0x05010891, val64);
- rc = putscom_abs(0x03010811, val64);
- rc = putscom_abs(0x03010891, val64);
-
// If inband scom is not configured then assume the centaur does not exist
if (!mcfgpr.fields.mcfgprq_valid)
{
@@ -268,12 +266,6 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
PK_TRACE_DBG("Centar[%d] Base Address: %016llx",i,o_config->baseAddress[i]);
-
- // NOTE: P9 no longer has a mode bit to specify a "designated SYNC"
- // Centaur Spec says SYNC is needed for Z series, and for POR.
- // Since neither applys here, it will not longer be done by OCC.
-
-
// Add the Centaur to the configuration
o_config->config |= (CHIP_CONFIG_MCS(i) | CHIP_CONFIG_CENTAUR(i));
}
@@ -283,6 +275,32 @@ int gpe_centaur_configuration_create(CentaurConfiguration_t* o_config)
break;
}
+ // Find the designated sync
+ for (i = 0; i < (OCCHW_NCENTAUR/2); ++i)
+ {
+ uint64_t mcsync;
+ rc = getscom_abs(MCSYNC[i], &mcsync);
+ if (rc)
+ {
+ PK_TRACE("getscom failed on MCSYNC, rc = %d. The first configured MC will be the designated sync",rc);
+ rc = 0;
+ }
+ if (mcsync != 0)
+ {
+ designated_sync = i;
+ // There can only be one sync, so stop searching.
+ break;
+ }
+ }
+
+ if (designated_sync < 0)
+ {
+ designated_sync = cntlz32(o_config->config << CHIP_CONFIG_MCS_BASE);
+ PK_TRACE("No designated sync found, using MCS(%d)",designated_sync);
+ }
+
+ o_config->mcSyncAddr = MCSYNC[designated_sync];
+
// Configure the PBA BAR and PBA BARMSK.
// Set the BARMSK bits such that:
diff --git a/src/occ_gpe1/gpe_centaur_scom.c b/src/occ_gpe1/gpe_centaur_scom.c
index afe1d3b..4cd4cf5 100644
--- a/src/occ_gpe1/gpe_centaur_scom.c
+++ b/src/occ_gpe1/gpe_centaur_scom.c
@@ -536,15 +536,50 @@ int centaur_get_mem_data(CentaurConfiguration_t* i_config,
}
-// CentaurConfiguration needs to be setup before this is called
+int centaur_scom_sync(CentaurConfiguration_t* i_config)
+{
+ uint64_t data;
+ int rc = 0;
+ do
+ {
+ rc = getscom_abs(i_config->mcSyncAddr,&data);
+ if (rc)
+ {
+ PK_TRACE("centaur_scom_sync: getscom failed. rc = %d",rc);
+ break;
+ }
+
+ data &= ~MCS_MCSYNC_SYNC_GO;
+
+ rc = putscom_abs(i_config->mcSyncAddr, data);
+ if (rc)
+ {
+ PK_TRACE("centaur_scom_sync: reset sync putscom failed. rc = %d",rc);
+ break;
+ }
+
+ data |= MCS_MCSYNC_SYNC_GO;
+
+ rc = putscom_abs(i_config->mcSyncAddr, data);
+ if (rc)
+ {
+ PK_TRACE("centaur_scom_sync: set sync putscom failed. rc = %d",rc);
+ break;
+ }
+ } while (0);
+
+ return rc;
+}
+
+// CentaurConfiguration needs to be setup before this is called
void gpe_scom_centaur(CentaurConfiguration_t* i_config,
CentaurScomParms_t* i_parms)
{
int i;
+ int rc = 0;
mtmsr((mfmsr() & ~(MSR_SIBRC | MSR_SIBRCA)) | MSR_SEM);
- // Do reset and pba_setup here?
for(i = 0; i < i_parms->entries; ++i)
{
switch(i_parms->scomList[i].commandType)
@@ -553,49 +588,58 @@ void gpe_scom_centaur(CentaurConfiguration_t* i_config,
break;
case CENTAUR_SCOM_READ:
- centaur_get_scom(i_config,
- i_parms->scomList[i].instanceNumber,
- i_parms->scomList[i].scom,
- &(i_parms->scomList[i].data));
+ rc =centaur_get_scom(i_config,
+ i_parms->scomList[i].instanceNumber,
+ i_parms->scomList[i].scom,
+ &(i_parms->scomList[i].data));
break;
case CENTAUR_SCOM_WRITE:
- centaur_put_scom(i_config,
- i_parms->scomList[i].instanceNumber,
- i_parms->scomList[i].scom,
- i_parms->scomList[i].data);
+ rc = centaur_put_scom(i_config,
+ i_parms->scomList[i].instanceNumber,
+ i_parms->scomList[i].scom,
+ i_parms->scomList[i].data);
break;
case CENTAUR_SCOM_RMW:
- centaur_scom_rmw(i_config,
- i_parms->scomList[i].instanceNumber,
- i_parms->scomList[i].scom,
- i_parms->scomList[i].mask,
- &(i_parms->scomList[i].data));
+ rc = centaur_scom_rmw(i_config,
+ i_parms->scomList[i].instanceNumber,
+ i_parms->scomList[i].scom,
+ i_parms->scomList[i].mask,
+ &(i_parms->scomList[i].data));
break;
case CENTAUR_SCOM_READ_VECTOR:
- centaur_get_scom_vector(i_config,
- i_parms->scomList[i].scom,
- i_parms->scomList[i].pData
- );
+ rc = centaur_get_scom_vector(i_config,
+ i_parms->scomList[i].scom,
+ i_parms->scomList[i].pData
+ );
break;
case CENTAUR_SCOM_WRITE_ALL:
- centaur_put_scom_all(i_config,
- i_parms->scomList[i].scom,
- i_parms->scomList[i].data);
+ rc = centaur_put_scom_all(i_config,
+ i_parms->scomList[i].scom,
+ i_parms->scomList[i].data);
break;
case CENTAUR_SCOM_RMW_ALL:
- centaur_scom_rmw_all(i_config,
- i_parms->scomList[i].scom,
- i_parms->scomList[i].mask,
- i_parms->scomList[i].data);
+ rc = centaur_scom_rmw_all(i_config,
+ i_parms->scomList[i].scom,
+ i_parms->scomList[i].mask,
+ i_parms->scomList[i].data);
+ break;
+
+ case CENTAUR_SCOM_CENTAUR_SYNC:
+ rc = centaur_scom_sync(i_config);
break;
default:
break;
};
+ i_parms->error.rc = rc;
+ if (rc)
+ {
+ break;
+ }
}
}
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