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| author | Chris Cain <cjcain@us.ibm.com> | 2016-01-21 08:08:22 -0600 |
|---|---|---|
| committer | Christopher J. Cain <cjcain@us.ibm.com> | 2016-03-01 10:04:07 -0500 |
| commit | 0b38bc9d5f8a7ab2fe466a3a432ade97eb5f8971 (patch) | |
| tree | 6238bd93a590b4b38e69fbc1dd6513b1bb7955de /src/occ_gpe1 | |
| parent | 8d6b58d82125223c07fa0c4fa795c0de52eefd2a (diff) | |
| download | talos-occ-0b38bc9d5f8a7ab2fe466a3a432ade97eb5f8971.tar.gz talos-occ-0b38bc9d5f8a7ab2fe466a3a432ade97eb5f8971.zip | |
Implement I2C locking with host
Change-Id: I9e99e799e0df442bebef473360ca87d564f5ddaf
RTC: 140545
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/12898
Tested-by: FSP CI Jenkins
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Diffstat (limited to 'src/occ_gpe1')
| -rw-r--r-- | src/occ_gpe1/gpe1_dimm_read.c | 6 | ||||
| -rw-r--r-- | src/occ_gpe1/gpe1_dimm_reset.c | 30 |
2 files changed, 18 insertions, 18 deletions
diff --git a/src/occ_gpe1/gpe1_dimm_read.c b/src/occ_gpe1/gpe1_dimm_read.c index be19506..d89b0bf 100644 --- a/src/occ_gpe1/gpe1_dimm_read.c +++ b/src/occ_gpe1/gpe1_dimm_read.c @@ -210,7 +210,7 @@ void dimm_write_int_mask(ipc_msg_t* cmd, void* arg) scomAddr, WORD_HIGH(regValue), WORD_LOW(regValue)); // max_num_of_ports (bits 9:15) args->maxPorts = (regValue >> 48) & 0x7F; - PK_TRACE("dimm_write_int_mask: maxPorts = %d", args->maxPorts); + GPE1_DIMM_DBG("dimm_write_int_mask: maxPorts = %d", args->maxPorts); } } // end dimm_write_int_mask() @@ -481,8 +481,8 @@ void dimm_read_temp(ipc_msg_t* cmd, void* arg) args->error.error = 0; args->error.rc = GPE_RC_SUCCESS; args->error.ffdc = 0; - PK_TRACE("dimm_read_temp: DIMM%04X temperature=%dC", - (args->i2cPort<<8)|args->dimm, args->temp); + GPE1_DIMM_DBG("dimm_read_temp: DIMM%04X temperature=%dC", + (args->i2cPort<<8)|args->dimm, args->temp); // Check for operation complete bit // (operation complete bit will not get set until all diff --git a/src/occ_gpe1/gpe1_dimm_reset.c b/src/occ_gpe1/gpe1_dimm_reset.c index 9963eec..eedc917 100644 --- a/src/occ_gpe1/gpe1_dimm_reset.c +++ b/src/occ_gpe1/gpe1_dimm_reset.c @@ -76,22 +76,22 @@ void dimm_reset_master(ipc_msg_t* cmd, void* arg) { GPE1_DIMM_DBG("dimm_reset_master: putscom(0x%08X,0x%08X%08X) SUCCESS - IMM_RESET_I2C", scomAddr, WORD_HIGH(regValue), WORD_LOW(regValue)); - } - // Force reset of Port_busy_register - scomAddr = I2C_BUSY_REGISTER | SCOM_ENGINE_OFFSET(args->i2cEngine); - regValue = 0x8000000000000000; - rc = putscom_abs(scomAddr, regValue); - if(rc) - { - PK_TRACE("dimm_reset_master: I2C_BUSY_REGISTER putscom 0x%08X->0x%08X%08X FAILED. rc = 0x%08x", - scomAddr, WORD_HIGH(regValue), WORD_LOW(regValue), rc); - gpe_set_ffdc(&(args->error), scomAddr, GPE_RC_SCOM_PUT_FAILED, rc); - } - else - { - GPE1_DIMM_DBG("dimm_reset_master: putscom(0x%08X,0x%08X%08X) SUCCESS - I2C_BUSY_REGISTER", - scomAddr, WORD_HIGH(regValue), WORD_LOW(regValue)); + // Force reset of Port_busy_register + scomAddr = I2C_BUSY_REGISTER | SCOM_ENGINE_OFFSET(args->i2cEngine); + regValue = 0x8000000000000000; + rc = putscom_abs(scomAddr, regValue); + if(rc) + { + PK_TRACE("dimm_reset_master: I2C_BUSY_REGISTER putscom 0x%08X->0x%08X%08X FAILED. rc = 0x%08x", + scomAddr, WORD_HIGH(regValue), WORD_LOW(regValue), rc); + gpe_set_ffdc(&(args->error), scomAddr, GPE_RC_SCOM_PUT_FAILED, rc); + } + else + { + GPE1_DIMM_DBG("dimm_reset_master: putscom(0x%08X,0x%08X%08X) SUCCESS - I2C_BUSY_REGISTER", + scomAddr, WORD_HIGH(regValue), WORD_LOW(regValue)); + } } } // end dimm_reset_master() |
