Implement task_poke_watchdogs

task_poke_watchdogs() should be called every 2ms (ticks 1 and 9) on both
master and slaves while in observation and active state and do the following:
1.  Every time called:  Enable/Reset the OCC heartbeat:  done by a write to
    OCB OCC Heartbeat Register (set count to 8ms)
2.  Every time called:  Reset memory deadman timer for 1 MCA (skip if not
    present and just wait until next call to check next MCA to keep same
    timing of reset per MCA regardless of # present)  Resetting the deadman
    is done by reading one of the memory performance counters, use one at
    SCOM offset 0x13C.  NOTE:  Will take 16ms (8 MCAs x 2ms) to reset all
    memory timers, this is fine since the shortest time the deadman timeout
    can be configured to is 28ms
3.  Every 4ms (on tick 1 only) :  Verify PGPE is still functional by reading
    PGPE Beacon from SRAM if after 8ms (2 consecutive checks) there is no
    change to the PGPE Beacon count then log an error and request reset.

In addition, this commit adds entries for the PGPE image header and shared
SRAM in the TLB, and partially reads PGPE image header parameters.

Change-Id: I9906102b3349506612d55c57e9f5c28441eaeb39
RTC: 154960
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31916
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>

2 files changed, 67 insertions, 2 deletions

diff --git a/src/occ_gpe1/gpe1_dimm_control.c b/src/occ_gpe1/gpe1_dimm_control.c
index 99d5395..65ca4b6 100644
--- a/src/occ_gpe1/gpe1_dimm_control.c
+++ b/src/occ_gpe1/gpe1_dimm_control.c
@@ -54,7 +54,7 @@ void gpe_dimm_control(ipc_msg_t* cmd, void* arg)
 {
     // Note: arg was set to 0 in ipc func table (ipc_func_tables.c), so don't use it.
     // the ipc arguments passed through the ipc_msg_t structure, has a pointer
-    // to the G_gpe_start_pwr_meas_read_args struct.
+    // to the dimm_control_args_t struct.
 
     int      rc;
     uint64_t regValue; // a pointer to hold the putscom_abs register value
@@ -118,4 +118,68 @@ void gpe_dimm_control(ipc_msg_t* cmd, void* arg)
     }
 }
 
+/*
+ * Function Specifications:
+ *
+ * Name: gpe_reset_mem_deadman
+ *
+ * Description:  Read memory deadman timer for one MCA
+ *               This effectively resets the memory deadman timer
+ *
+ * Inputs:       cmd is a pointer to IPC msg's cmd and cmd_data struct
+ *
+ * Outputs:      error: sets rc, address, and ffdc in the cmd_data's
+ *                      GpeErrorStruct
+ *
+ * End Function Specification
+ */
+
+void gpe_reset_mem_deadman(ipc_msg_t* cmd, void* arg)
+{
+    // Note: arg was set to 0 in ipc func table (ipc_func_tables.c), so don't use it.
+    // the ipc arguments passed through the ipc_msg_t structure, has a pointer
+    // to the reset_mem_deadman_args_t struct.
+
+    int      rc = 0;
+    // @TODO: uncomment when deadman timer scom registers are definied in simics. RTC: 163713
+    //uint64_t regValue; // a pointer to hold the putscom_abs register value
+    ipc_async_cmd_t *async_cmd = (ipc_async_cmd_t*)cmd;
+    reset_mem_deadman_args_t *args = (reset_mem_deadman_args_t*)async_cmd->cmd_data;
+
+    int mca = args->mca; // Nimbus MCA; mc_pair = mca >>2 and port = mca & 3
+
+    args->error.error = 0;
+    args->error.ffdc = 0;
 
+    do
+    {   // read Deadman timer's SCOM Register for specified MCA (MC pair and port numbers)
+        // @TODO: uncomment when deadman timer scom registers are definied in simics. RTC: 163713, RTC: 163934
+        //rc = getscom_abs(DEADMAN_TIMER_MCA(mca), &regValue);
+        if(rc)
+        {
+            PK_TRACE("gpe_reset_mem_deadman: Deadman timer read failed"
+                     "MCA:0x%08x, Address:0x%08x, rc:0x%08x",
+                     mca, DEADMAN_TIMER_MCA(mca), rc);
+
+            gpe_set_ffdc(&(args->error), DEADMAN_TIMER_MCA(mca),
+                         GPE_RC_SCOM_GET_FAILED, rc);
+            break;
+        }
+        else
+        {
+            GPE1_DIMM_DBG("gpe_reset_mem_deadman: Deadman timer reset successfully"
+                     "MCA:0x%08x, Address:0x%08x, deadman value:0x%08x",
+                     mca, DEADMAN_TIMER_MCA(mca), regValue);
+
+        }
+    } while(0);
+
+    // send back a response, IPC success even if ffdc/rc are non zeros
+    rc = ipc_send_rsp(cmd, IPC_RC_SUCCESS);
+    if(rc)
+    {
+        PK_TRACE("gpe_reset_mem_deadman: Failed to send response back. Halting GPE1", rc);
+        gpe_set_ffdc(&(args->error), 0x00, GPE_RC_IPC_SEND_FAILED, rc);
+        pk_halt();
+    }
+}
diff --git a/src/occ_gpe1/ipc_func_tables.c b/src/occ_gpe1/ipc_func_tables.c
index d575ae3..7cc9927 100644
--- a/src/occ_gpe1/ipc_func_tables.c
+++ b/src/occ_gpe1/ipc_func_tables.c
@@ -27,6 +27,7 @@
 
 void gpe_dimm_control(ipc_msg_t* cmd, void* arg);
 void gpe1_nop(ipc_msg_t* cmd, void* arg);
+void gpe_reset_mem_deadman(ipc_msg_t* cmd, void* arg);
 
 // Function table for multi target (common) functions
 IPC_MT_FUNC_TABLE_START
@@ -45,7 +46,7 @@ IPC_ST_FUNC_TABLE_START
 IPC_HANDLER(gpe_dimm_sm, 0)                  // 0 - IPC_ST_DIMM_SM_FUNCID
 IPC_HANDLER(gpe_dimm_control, 0)             // 1 - IPC_ST_DIMM_CONTROL_FUNCID
 IPC_HANDLER(gpe1_nop, 0)                     // 2 - IPC_ST_GPE1_NOP
-IPC_HANDLER_DEFAULT                          // 3
+IPC_HANDLER(gpe_reset_mem_deadman, 0)        // 3 - IPC_ST_RESET_MEM_DEADMAN
 IPC_HANDLER_DEFAULT                          // 4
 IPC_HANDLER_DEFAULT                          // 5
 IPC_HANDLER_DEFAULT                          // 6