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path: root/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
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* AMDGPU: s[102:103] is unavailable on VIMatt Arsenault2015-11-031-1/+10
* AMDGPU: Define correct number of SGPRsMatt Arsenault2015-11-031-0/+4
* AMDGPU: Stop reserving v[254:255]Matt Arsenault2015-10-201-4/+0
* Make a bunch of static arrays const.Craig Topper2015-10-181-1/+1
* AMDGPU: Make SIInsertWaits about a factor of 4 fasterMatt Arsenault2015-10-011-0/+2
* AMDGPU: Switch over reg class size instead of checking all super classesMatt Arsenault2015-09-261-20/+34
* Introduce target hook for optimizing register copiesMatt Arsenault2015-09-241-0/+24
* Untabify.NAKAMURA Takumi2015-09-221-1/+1
* Reformat blank lines.NAKAMURA Takumi2015-09-221-1/+0
* AMDGPU: Remove dead codeMatt Arsenault2015-09-191-8/+0
* AMDGPU: Set mem operands for spill instructionsMatt Arsenault2015-08-291-8/+9
* AMDGPU: Make sure to reserve super registersMatt Arsenault2015-08-261-16/+15
* MachineRegisterInfo: Introduce isPhysRegUsed()Matthias Braun2015-08-181-6/+3
* AMDGPU/SI: Add missing spill classTom Stellard2015-08-141-1/+2
* AMDGPU: Remove SCCReg.Matt Arsenault2015-08-051-2/+0
* MachineRegisterInfo: Remove UsedPhysReg infrastructureMatthias Braun2015-07-141-1/+1
* R600 -> AMDGPU renameTom Stellard2015-06-131-0/+543
* Revert "AMDGPU: Add core backend files for R600/SI codegen v6"Tom Stellard2012-07-161-51/+0
* AMDGPU: Add core backend files for R600/SI codegen v6Tom Stellard2012-07-161-0/+51
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