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* Revert "Recommit "[GlobalOpt] Pass DTU to removeUnreachableBlocks instead of ...Florian Hahn2020-01-141-3/+7
* [AIX] ExternalSymbolSDNode loweringXiangling Liao2020-01-141-24/+64
* AArch64: fix bitcode upgrade of @llvm.neon.addp.Tim Northover2020-01-141-4/+3
* [FPEnv] Fix chain handling regression after 04a8696Ulrich Weigand2020-01-142-34/+31
* Make helper functions static or move them into anonymous namespaces. NFC.Benjamin Kramer2020-01-144-7/+7
* [ARM,MVE] Use the new Tablegen `defvar` and `if` statements.Simon Tatham2020-01-141-253/+232
* [ARM][LowOverheadLoops] Allow all MVE instrs.Sam Parker2020-01-141-21/+18
* Fix "MIParser::getIRValue(unsigned int)’ defined but not used" warning. NFCI.Simon Pilgrim2020-01-141-6/+0
* [SelectionDAG] ComputeKnownBits - merge getValidMinimumShiftAmountConstant() ...Simon Pilgrim2020-01-141-11/+12
* [ARM][LowOverheadLoops] Change predicate inspectionSam Parker2020-01-141-26/+27
* [ARM][Thumb2] Fix ADD/SUB invalid writes to SPDiogo Sampaio2020-01-147-86/+351
* [SelectionDAG] ComputeKnownBits - merge getValidMinimumShiftAmountConstant() ...Simon Pilgrim2020-01-141-10/+12
* [ARM][MVE] Disallow VPSEL for tail predicationSam Parker2020-01-142-4/+16
* [ARM][MVE] Masked gathers from base + vector of offsetsAnna Welker2020-01-141-38/+162
* [TableGen] Introduce an if/then/else statement.Simon Tatham2020-01-144-12/+137
* [TableGen] Introduce a `defvar` statement.Simon Tatham2020-01-144-5/+135
* [AMDGPU] Model distance to instruction in bundleStanislav Mekhanoshin2020-01-141-5/+17
* [AMDGPU] Fix getInstrLatency() always returning 1Stanislav Mekhanoshin2020-01-142-3/+7
* [MC] Don't resolve relocations referencing STB_LOCAL STT_GNU_IFUNCFangrui Song2020-01-131-1/+2
* [X86] Copy the nofpexcept flag when folding a load into an instruction using ...Craig Topper2020-01-131-0/+4
* [GlobalISel] Change representation of shuffle masks in MachineOperand.Eli Friedman2020-01-138-53/+27
* [PGO][CHR] Guard against 0-to-0 branch weight and avoid division by zero crash.Hiroshi Yamauchi2020-01-131-0/+4
* Revert "[DWARF5][DebugInfo]: Added support for DebugInfo generation for auto ...Amy Huang2020-01-131-8/+0
* [ThinLTO/WPD] Fix index-based WPD for alias vtablesTeresa Johnson2020-01-131-1/+1
* [LegalizeIntegerTypes][X86] Add support for expanding input of STRICT_SINT_TO...Craig Topper2020-01-131-6/+30
* [Dsymutil][Debuginfo][NFC] #3 Refactor dsymutil to separate DWARF optimizing ...Alexey Lapshin2020-01-131-0/+2
* [LTO] Constify lto::Config reference passed to backends (NFC)Teresa Johnson2020-01-132-18/+17
* Rework be15dfa88fb1 such that it works with GlobalISel which doesn't use EVTDaniel Sanders2020-01-131-3/+11
* [X86][Disassembler] Fix a bug when disassembling an empty stringFangrui Song2020-01-131-1/+3
* [llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands.Puyan Lotfi2020-01-131-1/+2
* AMDGPU/GlobalISel: Select llvm.amdgcn.ds.ordered.{add|swap}Matt Arsenault2020-01-132-0/+88
* [SelectionDAG] ComputeNumSignBits add getValidMaximumShiftAmountConstant() fo...Simon Pilgrim2020-01-131-0/+31
* AMDGPU/GlobalISel: Set insert point after waterfall loopMatt Arsenault2020-01-131-2/+3
* AMDGPU/GlobalISel: Fix branch targets when emitting SI_IFMatt Arsenault2020-01-131-7/+30
* AMDGPU/GlobalISel: Simplify assertMatt Arsenault2020-01-131-11/+3
* [LegalizeTypes] Add SoftenFloatResult support for STRICT_SINT_TO_FP/STRICT_UI...Andrew Wei2020-01-141-8/+16
* [SelectionDAG] ComputeNumSignBits add getValidMinimumShiftAmountConstant() IS...Simon Pilgrim2020-01-131-1/+4
* [Scheduler] Remove superfluous casts. NFCDavid Green2020-01-132-5/+3
* [AArch64][SVE] Add patterns for some arith SVE instructions.Danilo Carvalho Grael2020-01-135-10/+67
* [DebugInfo] Make debug line address size mismatch non-fatal to parsingJames Henderson2020-01-131-11/+20
* [Inlining] Add PreInlineThreshold for the new pass managerKazu Hirata2020-01-131-2/+6
* [RISCV] Handle globals and block addresses in asm operandsLuís Marques2020-01-131-0/+8
* [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or belowPablo Barrio2020-01-131-15/+33
* [MIPS] Don't emit R_(MICRO)MIPS_JALR relocations against data symbolsAlex Richardson2020-01-131-0/+9
* [MIPS][ELF] Use PC-relative relocations in .eh_frame when possibleAlex Richardson2020-01-132-3/+11
* [SelectionDAG] ComputeNumSignBits - Use getValidShiftAmountConstant for shift...Simon Pilgrim2020-01-131-15/+8
* [SelectionDAG] ComputeKnownBits - Add DemandedElts support to getValidShiftAm...Simon Pilgrim2020-01-131-8/+14
* [FPEnv] Fix chain handling for fpexcept.strict nodesUlrich Weigand2020-01-132-14/+81
* [SelectionDAG] ComputeKnownBits add getValidMinimumShiftAmountConstant() ISD:...Simon Pilgrim2020-01-131-0/+3
* [SelectionDAG] ComputeKnownBits - minimum leading/trailing zero bits in LSHR/...Simon Pilgrim2020-01-131-0/+11
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