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path: root/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
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* AMDGPU/SI: Implement a custom MachineSchedStrategyTom Stellard2016-08-291-0/+6
* XXXTom Stellard2016-08-261-1/+1
* AMDGPU/SI: Use a better method for determining the largest pressure setsTom Stellard2016-08-261-9/+28
* AMDGPU: Remove custom getSubRegMatt Arsenault2016-08-111-72/+10
* MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun2016-07-281-10/+10
* AMDGPU/SI: Don't use reserved VGPRs for SGPR spillingTom Stellard2016-07-281-3/+6
* AMDGPU: Add HSA dispatch id intrinsicMatt Arsenault2016-07-221-1/+2
* AMDGPU/SI: Emit the number of SGPR and VGPR spillsMarek Olsak2016-07-131-0/+2
* AMDGPU: Enable trackLivenessAfterRegAllocMatt Arsenault2016-07-111-0/+5
* AMDGPU: fix local stack slot allocation bugsNicolai Haehnle2016-07-111-2/+8
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-1/+1
* AMDGPU: Cleanup subtarget handling.Matt Arsenault2016-06-241-26/+22
* AMDGPU/SI: Propagate the Kill flag in storeRegToStackSlot and eliminateFrameI...Changpeng Fang2016-06-161-12/+26
* AMDGPU: Remove incorrect assertionMatt Arsenault2016-06-091-4/+0
* [AMDGPU][NFC] Rename ReserveTrapVGPRs -> ReserveRegsKonstantin Zhuravlyov2016-05-241-3/+3
* AMDGPU: Fix verifier error when spilling undef subregMatt Arsenault2016-05-181-3/+11
* AMDGPU/SI: Use v_readfirstlane_b32 when restoring SGPRs spilled to scratchTom Stellard2016-05-021-2/+1
* AMDGPU/SI: Set the kill flag on temp VGPRs used to restore SGPRs from scratchTom Stellard2016-05-021-1/+1
* AMDGPU/SI: Enable the post-ra schedulerTom Stellard2016-04-301-16/+11
* [AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunction...Konstantin Zhuravlyov2016-04-261-2/+3
* [AMDGPU] Reserve VGPRs for trap handler usage if instructedKonstantin Zhuravlyov2016-04-261-0/+11
* AMDGPU: Add queue ptr intrinsicMatt Arsenault2016-04-251-1/+2
* Silence some "initialized but unused" warnings from MSVC -- the function bein...Aaron Ballman2016-04-181-13/+2
* AMDGPU: Enable LocalStackSlotAllocation passMatt Arsenault2016-04-161-0/+138
* AMDGPU: allow specifying a workgroup size that needs to fit in a compute unitTom Stellard2016-04-141-52/+73
* AMDGPU/SI: Add support for spilling VGPRs without having to scavenge registersTom Stellard2016-04-131-10/+27
* [AMDGPU][llvm-mc] Support of Trap Handler registers (TTMP0..11 and TBA/TMA)gi...Artem Tamazov2016-04-131-1/+25
* AMDGPU/SI: Add MachineBasicBlock parameter to SIInstrInfo::insertWaitStatesTom Stellard2016-04-071-2/+2
* AMDGPU: Cache information about register pressure setsTom Stellard2016-03-231-24/+33
* AMDGPU/SI: add llvm.amdgcn.buffer.load/store.format intrinsicsNicolai Haehnle2016-03-101-3/+3
* AMDGPU/SI: Add support for spiling SGPRs to scratch bufferTom Stellard2016-03-041-17/+69
* AMDGPU/SI: Enable frame index scavenging during PrologEpilogueInserterTom Stellard2016-03-041-7/+13
* AMDGPU/SI: Detect uniform branches and emit s_cbranch instructionsTom Stellard2016-02-121-1/+4
* AMDGPU: Set flat_scratch from flat_scratch_init regMatt Arsenault2016-02-121-0/+5
* AMDGPU/SI: Make sure MIMG descriptors and samplers stay in SGPRsTom Stellard2016-02-111-0/+18
* AMDGPU: Release the scavenged offset register during VGPR spillNicolai Haehnle2016-02-101-1/+8
* AMDGPU/SI: Add SI Machine SchedulerNicolai Haehnle2016-01-131-1/+14
* AMDGPU/SI: Fold operands with sub-registersNicolai Haehnle2016-01-071-4/+30
* AMDGPU/SI: xnack_mask is always reserved on VINicolai Haehnle2016-01-071-31/+16
* AMDGPU: add +xnack featureNicolai Haehnle2016-01-041-6/+27
* AMDGPU: Avoid assertions after SGPR spilling failedNicolai Haehnle2016-01-041-10/+0
* AMDGPU: Fix off-by-one in SIRegisterInfo::eliminateFrameIndexNicolai Haehnle2015-12-171-6/+7
* Squelch unused variable warning in SIRegisterInfo.cpp.Matt Arsenault2015-12-011-1/+2
* AMDGPU: Rework how private buffer passed for HSAMatt Arsenault2015-11-301-18/+62
* AMDGPU: Rename enums to be consistent with HSA code object terminologyMatt Arsenault2015-11-301-14/+14
* AMDGPU: Remove SIPrepareScratchRegsMatt Arsenault2015-11-301-0/+19
* AMDGPU: Add llvm.amdgcn.dispatch.ptr intrinsicTom Stellard2015-11-261-0/+6
* Revert "Remove unnecessary call to getAllocatableRegClass"Tom Stellard2015-11-121-1/+7
* AMDGPU: Set isAllocatable = 0 on VS_32/VS_64Matt Arsenault2015-11-111-7/+1
* AMDGPU: Hack for VS_32 register pressureMatt Arsenault2015-11-061-4/+10
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