summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target
Commit message (Expand)AuthorAgeFilesLines
...
* AMDGPU/GlobalISel: Add equiv xform for bitcast_fpimm_to_i32Matt Arsenault2020-01-093-0/+17
* AMDGPU/GlobalISel: Fix add of neg inline constant patternMatt Arsenault2020-01-094-1/+26
* AMDGPU: Add register class to DS_SWIZZLE_B32 patternMatt Arsenault2020-01-091-1/+1
* [NFC][ARM] LowOverheadLoop commentsSam Parker2020-01-091-0/+16
* [ARM][MVE] Don't unroll intrinsic loops.Sam Parker2020-01-091-4/+5
* [VE] Target stub for NEC SX-AuroraKazushi (Jam) Marukawa2020-01-0913-0/+273
* Revert "[ARM][LowOverheadLoops] Update liveness info"Sam Parker2020-01-091-64/+0
* [ARM][LowOverheadLoops] Update liveness infoSam Parker2020-01-091-0/+64
* [APFloat] Fix checked error assert failuresEhud Katz2020-01-092-3/+3
* Revert "Revert "[MIR] Target specific MIR formating and parsing""Daniel Sanders2020-01-081-1/+4
* Revert "[MIR] Target specific MIR formating and parsing"Nico Weber2020-01-081-4/+1
* [MIR] Target specific MIR formating and parsingPeng Guo2020-01-081-1/+4
* Revert "[MIR] Target specific MIR formating and parsing"Daniel Sanders2020-01-081-4/+1
* [MIR] Target specific MIR formating and parsingPeng Guo2020-01-081-1/+4
* [PowerPC] when folding rlwinm+rlwinm. to andi., we should use first rlwinmZheng Chen2020-01-081-15/+21
* [PowerPC]: Add powerpcspe target triple subarch componentJustin Hibbits2020-01-081-0/+3
* [X86] Remove EFLAGS from live-in lists in X86FlagsCopyLowering.Jonas Paulsson2020-01-081-0/+3
* Revert "Merge memtag instructions with adjacent stack slots."Evgenii Stepanov2020-01-087-489/+30
* Merge memtag instructions with adjacent stack slots.Evgenii Stepanov2020-01-087-30/+489
* [X86] Keep cl::opts at top of file [NFC]Philip Reames2020-01-081-34/+34
* [X86] Custom type legalize v4i64->v4f32 uint_to_fp on sse4.1 targets in 64-bi...Craig Topper2020-01-081-9/+11
* [X86] Add isel patterns for bitcasting between v32i1/v64i1 and float/double.Craig Topper2020-01-081-0/+11
* [BranchAlign] Compiler support for suppressing branch alignPhilip Reames2020-01-082-2/+50
* Fix "pointer is null" static analyzer warning. NFCI.Simon Pilgrim2020-01-081-1/+1
* [amdgpu] Remove unused header. NFC.Michael Liao2020-01-081-1/+0
* [ARM,MVE] Intrinsics for variable shift instructions.Simon Tatham2020-01-081-12/+49
* [ARM,MVE] Intrinsics for partial-overwrite imm shifts.Simon Tatham2020-01-081-49/+123
* [ARM][MVE] Enable masked gathers from vector of pointersAnna Welker2020-01-086-1/+208
* AArch64: add missing Apple CPU names and use them by default.Tim Northover2020-01-084-7/+107
* [X86] Adding fp128 support for strict fcmpWang, Pengfei2020-01-081-5/+5
* [RISCV] Fix evalutePCRelLo for symbols at the end of a fragmentJames Clarke2020-01-081-1/+5
* AMDGPU: Annotate EXTRACT_SUBREGs with source register classesMatt Arsenault2020-01-071-24/+24
* AMDGPU/GlobalISel: Fix scalar G_SELECT for arbitrary pointersMatt Arsenault2020-01-071-1/+1
* AMDGPU: Apply i16 add->sub pattern with zext to i32Matt Arsenault2020-01-071-8/+15
* [X86] Enable v2i64->v2f32 uint_to_fp code in ReplaceNodeResults on SSE4.1 targetCraig Topper2020-01-071-3/+1
* AMDGPU: Remove VOP3Mods0Clamp0OModMatt Arsenault2020-01-076-34/+1
* AMDGPU: Fix misleading, misplaced end block commentsMatt Arsenault2020-01-071-2/+2
* AMDGPU: Use ImmLeafMatt Arsenault2020-01-071-2/+2
* AMDGPU: Fix not using v_cvt_f16_[iu]16Matt Arsenault2020-01-072-10/+35
* [PowerPC][Triple] Use elfv2 on freebsd>=13 and linux-muslFangrui Song2020-01-071-2/+0
* [MachineOutliner][AArch64] Save + restore LR in noreturn functionsJessica Paquette2020-01-071-1/+11
* [X86] Improve lowering of (v2i64 (setgt X, -1)) on pre-SSE2 targets. Enable v...Craig Topper2020-01-071-3/+14
* [X86] Improve lowering of v2i64 sign bit tests on pre-sse4.2 targetsCraig Topper2020-01-071-0/+13
* [X86] Pull out repeated SrcVT.getVectorNumElements() call. NFCI.Simon Pilgrim2020-01-071-2/+2
* [AIX][XCOFF]Implement mergeable constdiggerlin2020-01-071-2/+1
* AMDGPU/GlobalISel: Fix readfirstlane pattern importMatt Arsenault2020-01-072-2/+2
* AMDGPU/GlobalISel: Fix import of s_abs_i32 patternMatt Arsenault2020-01-071-1/+1
* AMDGPU/GlobalISel: Select llvm.amdgcn.wqm.voteMatt Arsenault2020-01-071-2/+2
* AMDGPU/GlobalISel: Partially fix llvm.amdgcn.kill pattern importMatt Arsenault2020-01-071-4/+4
* [ARM][MVE] VPT Blocks: findVCMPToFoldIntoVPSSjoerd Meijer2020-01-071-31/+41
OpenPOWER on IntegriCloud