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path: root/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
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* Update p9_sbe_load_bootloader Hwp to receive the addr-key stash-2Raja Das2017-08-111-0/+4
* Use DD1 SW reset for XIVE unit until we get HW reset working in DD2crgeddes2017-07-311-1/+4
* TP, Nest FIR updates -- DD2 updates to match RAS XMLJoe McGill2017-07-261-0/+4
* p9_sbe_tracearray: Nimbus DD2 updatesJoachim Fenkes2017-07-241-0/+4
* PM: Delete deprecated attributesGreg Still2017-07-141-1/+1
* Create dmi.pll.scan.initfileBen Gass2017-07-141-0/+4
* HW414700 checkstop on UEs and disable core ECC counterLuke C. Murray2017-07-131-0/+4
* mc_pll_bucket attributeAnusha Reddy Rangareddygari2017-07-121-0/+4
* dcc skew adjust procedure updateAnusha Reddy Rangareddygari2017-07-121-0/+9
* Cumulus proc updatesAnusha Reddy Rangareddygari2017-07-121-0/+5
* p9_sbe_select_ex: add fused core booting supportGreg Still2017-07-031-0/+5
* L3 update -- p9_suspend_ioThi Tran2017-06-261-1/+4
* add support for OBUS PLL bucketsJoe McGill2017-06-231-0/+16
* Check Scratch Register 3 bit 7 and set new ATTR_SECURE_SETTINGSMike Baiocchi2017-06-071-0/+4
* future proof EC feature attributes, add missing P9N DD2 initsJoe McGill2017-05-311-2/+2
* L3 updates -- p9_build_smp, p9_fbc_utilsJoe McGill2017-05-281-0/+5
* p9_sbe_nest_initf -- add HWP support to scan n3_br_fureJoe McGill2017-05-191-0/+5
* p9_hcd_cache_dcc_skewadjust_setupAnusha Reddy Rangareddygari2017-05-111-0/+9
* NMMU Nimbus dd2 scom/scan updates, updated commentsEmmanuel Sacristan2017-05-111-0/+4
* p9_sbe_attributes.xml -- add entries for effective FBC IDsJoe McGill2017-05-041-0/+8
* Fix for HW397129-set bit 52 in the ALTD_OPTION reg to keep MC fastpath enabledCHRISTINA L. GRAVES2017-04-061-0/+6
* p9_sbe_chiplet_reset,p9_sbe_arrayinitAnusha Reddy Rangareddygari2017-03-291-0/+8
* Attribute support of customization of Nimbus DD1 PCI reference clock speed.Thi Tran2017-03-231-1/+5
* Add ec_abst ring to p9n.hw_imageThi Tran2017-03-101-0/+4
* HW399609: DD1 changing core/nest hang limit or hang pulse dividerYue Du2017-02-241-0/+4
* Removing ATTR_PROC_FABRIC_ADDR_BAR_MODEThi Tran2017-02-211-4/+0
* Make ATTR_CHIP_UNIT_POS virtualSantosh Puranik2017-02-191-65/+2
* Workaround to fix issue where Powerbus loses track of EQs in DD1Raja Das2017-02-161-0/+4
* ATTR_CHIP_EC_FEATURE_CORE_TRACE_SCOMABLE attribute in SBEspashabk-in2017-02-031-0/+4
* Control NDL training updateAnusha Reddy Rangareddygari2017-01-311-0/+4
* VITAL cleaning for DD2Anusha Reddy Rangareddygari2017-01-241-5/+1
* p9_sbe_tp_chiplet_init3 -- disable TP TOD hang pulseJoe McGill2017-01-241-0/+4
* Set plck as default mode in ATTR_BOOT_FLAGSSantosh Puranik2017-01-221-1/+1
* p9_sbe_chiplet_reset -- drive PCIE PLL from SS filter PLL for DD1.xJoe McGill2017-01-171-1/+5
* HW396520: DD1 workaround skip flushmode inhibit drop in cache hwpYue Du2016-12-201-0/+4
* Remove unused SBE attributesSantosh Puranik2016-11-281-126/+1
* p9_sbe_lpc_init fix with GPIO resetCHRISTINA L. GRAVES2016-11-211-0/+4
* p9_sbe_attr_setup updatesAnusha Reddy Rangareddygari2016-11-211-0/+4
* Istep4: Enable poll for DPLL lock in p9_hcd_cache_dpll_setupYue Du2016-11-211-1/+4
* sector buffer,pulse mode attributesAnusha Reddy Rangareddygari2016-11-081-0/+12
* Add support for ATTR_PROC_FABRIC_PUMP_MODE in sbe attribute xmlSachin Gupta2016-10-151-2/+8
* Lab: DD1 VCS workaround fixYue Du2016-10-141-0/+5
* DD2 updates:p9_sbe_arrayinit,p9_sbe_tp_arrayinitAnusha Reddy Rangareddygari2016-10-101-5/+1
* L2 version - p9_sbe_sequence_drtmSantosh2016-10-041-0/+5
* Fixing MC & EP attr_pg for sc model config - p9_sbe_attr.xmlSoma BhanuTej2016-10-031-4/+4
* xip_customize: Updated mailbox attribute support.Claus Michael Olsen2016-09-291-147/+117
* Unpack attributes for Pervasive targetsSantosh Puranik2016-09-191-1/+39
* Adding in configurations for PNOR/LPC communicationCHRISTINA L. GRAVES2016-09-161-1/+1
* PLL configuration updates -- permit e2e bypass executionJoe McGill2016-09-061-1/+9
* SBE move import`Shakeeb2016-09-011-0/+525
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