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| author | Joe McGill <jmcgill@us.ibm.com> | 2017-01-16 20:18:47 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-01-17 21:33:11 -0500 |
| commit | 04df965bfac57f2195f3cbba79906086240ebe34 (patch) | |
| tree | 4f18d7987177a1df691bcbae06f7eb1cb36a8be5 /src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml | |
| parent | 64a4edd5b79f0f1f8e41fea892ebd7757e04fa6e (diff) | |
| download | talos-sbe-04df965bfac57f2195f3cbba79906086240ebe34.tar.gz talos-sbe-04df965bfac57f2195f3cbba79906086240ebe34.zip | |
p9_sbe_chiplet_reset -- drive PCIE PLL from SS filter PLL for DD1.x
For DD1.0[123], to obtain Gen3 or Gen4 operation, we need to
run the PCIE clocks at a slower speed. For simplicity we will
just do this across the board for all DD1.0 parts.
34389 updates the SS filter PLL to output a reduced frequency
output (94 MHz instead of 100 MHz nominal) for DD1 only.
This commit will trigger the SBE to use the SS filter PLL to
feed the downstream PCIE PLLs, for DD1 only.
Change-Id: I344455de1fc54e9180090740b5725d580cb35b6f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34985
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34996
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index cfdae245..e66b27f8 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -5,7 +5,7 @@ <!-- --> <!-- OpenPOWER sbe Project --> <!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2015,2016 --> +<!-- Contributors Listed Below - COPYRIGHT 2015,2017 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -416,6 +416,10 @@ attribute tank <name>ATTR_CHIP_EC_FEATURE_LPC_RESET_GPIO</name> <virtual/> </entry> + <entry> + <name>ATTR_CHIP_EC_FEATURE_SLOW_PCI_REF_CLOCK</name> + <virtual/> + </entry> <entry> <name>ATTR_PROC_XSCOM_BAR_BASE_ADDR_OFFSET</name> |
