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| author | Greg Still <stillgs@us.ibm.com> | 2017-05-30 23:16:35 -0500 |
|---|---|---|
| committer | AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> | 2017-07-03 06:31:34 -0400 |
| commit | d1658d9114197fc93f7405841d05b5dc31f8c87b (patch) | |
| tree | bbc79f893f1577199c6bdbb140da6f290dafae01 /src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml | |
| parent | 05c6e8f3c920080fefe90c63c8180e1c76339f55 (diff) | |
| download | talos-sbe-d1658d9114197fc93f7405841d05b5dc31f8c87b.tar.gz talos-sbe-d1658d9114197fc93f7405841d05b5dc31f8c87b.zip | |
p9_sbe_select_ex: add fused core booting support
- Reads ATTR_FUSED_CORE_MODE attribute in "single" mode.
- Checks that the first core found is an even core
- Checks that the odd core in the EX associated with the first core is
functional
- Adds the second core to the CCSR in the OCB for istep 4 use.
- Added callouts for Level 3
- Fix error testing bugs
- Addressed callout comments
- Addressed review comments
Change-Id: Id095c1300a96ff52f311836c9dcbe93226014ff0
RTC: 173949
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41149
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41151
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index a3a1cac8..5cd836a6 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -322,6 +322,11 @@ <name>ATTR_VDM_ENABLE</name> <value>0x0</value> </entry> + <entry> + <name>ATTR_FUSED_CORE_MODE</name> + <value>0x0</value> + </entry> + <!-- See chip_attributes.xml for a description of ATTR_EC --> <entry> <name>ATTR_EC</name> |
