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| author | Luke C. Murray <murrayl@us.ibm.com> | 2017-07-07 17:18:28 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-07-13 02:25:36 -0400 |
| commit | fbba33a797f75f41b74bbb5f5ccfc763f78c31de (patch) | |
| tree | 6a7dd3c00894029fda44b72a7d053c3f81a1a8be /src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml | |
| parent | 40bee3d621ef42e6b9632a5a07be799d2331aa56 (diff) | |
| download | talos-sbe-fbba33a797f75f41b74bbb5f5ccfc763f78c31de.tar.gz talos-sbe-fbba33a797f75f41b74bbb5f5ccfc763f78c31de.zip | |
HW414700 checkstop on UEs and disable core ECC counter
Core
ECP.PC.FIR.THRESHOLD_RESET = 0b00 to disable
CXA, L2, L3, NMMU, NX, VAS, FBC, MC FIR changes to checkstop on UE at source
Change-Id: I4400acb7d3ec68cced49adb5a77fec7bd8356d40
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42887
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42942
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index 00f50388..4599bfd5 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -492,6 +492,10 @@ attribute tank <virtual/> </entry> <entry> + <name>ATTR_CHIP_EC_FEATURE_HW414700</name> + <virtual/> + </entry> + <entry> <name>ATTR_SYSTEM_CORECACHE_SKEWADJ_DISABLE</name> <value>0x0</value> </entry> |
