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* PM: Move to chip EC based #V validity checking in p9_pstate_parameter_blockGreg Still2017-09-222-1/+52
* Allow request fused mode bit when in HW fused modeDean Sanner2017-09-221-2/+4
* PM/MPIPL: p9_quad_power_off Level 3Greg Still2017-09-213-34/+65
* Core workarounds for multiple issues.Nick Klazynski2017-09-211-2/+140
* SBE PUTRING: Reduce function parameter count from 6 to 5Prasad Bg Ranganath2017-09-213-9/+4
* SBE:Putring: Added more debug informationPrasad Bg Ranganath2017-09-204-7/+90
* PM: clear OCB Heartbeat enable during pm_resetGreg Still2017-09-202-1/+11
* STOP: remove union usage in p9_pm_hcd_flags.hYue Du2017-09-201-156/+38
* PGPE: PGPE Op Trace updatesAdam Hale2017-09-201-1/+4
* Nimbus DD22 support updates to ekbSoma BhanuTej2017-09-203-19/+20
* HWP: Fixing pfet sense bit bug in p9_hcd_common_poweronoffYue Du2017-09-201-15/+17
* PM Level 3 for multiple proceduresAmit Kumar2017-09-208-599/+626
* Addition of missing registers in whitelist for IPLspashabk-in2017-09-201-52/+104
* Moved MPIPL isteps/functionalities to seeprom from pibmemRaja Das2017-09-202-62/+89
* Prime PSSCR reg on thread 1 so istep 16 works in SMT1Dean Sanner2017-09-191-0/+5
* L3 Update - p9_hcd_cache_stopclocks HWPThi Tran2017-09-176-41/+210
* Updates for HW416934 and HW417233Ben Gass2017-09-172-4/+57
* HW415528 and HW419742Nick Klazynski2017-09-171-8/+24
* Make DD2 as default in debug toolsSachin Gupta2017-09-151-1/+1
* Mask special attention in MPIPLSachin Gupta2017-09-151-1/+42
* PK,IOTA: Enter idle state at a known locationDoug Gilbert2017-09-142-1/+22
* Update sbe local reg dump optionsspashabk-in2017-09-141-1/+1
* StopClocks: Fence Refresh region if L3 region clock is stoppedYue Du2017-09-131-1/+17
* Expanding MCU tag fifo settings to be freq dependent.Lennard Streat2017-09-131-0/+18
* SBE debug tool - stack usage from pibmem dumpspashabk-in2017-09-121-8/+11
* PSTATE: Safe mode implmentation in PPBPrasad Bg Ranganath2017-09-121-0/+55
* [Whitelist/Blacklist] - Adding test cases for table generationspashabk-in2017-09-123-0/+231
* Add updates for NDD2.1, Serialize TB, Perf workaroundsNick Klazynski2017-09-121-11/+131
* Remove logic to disable memory clocks in STR if in PD_AND_STR_CLK_STOP modeAndre Marin2017-09-121-18/+0
* ATTR_CHIP_EC_FEATURE_HW406337 support for AxoneAbhishek Agarwal2017-09-122-3/+10
* HW415692: Make workaround permanentJoachim Fenkes2017-09-121-2/+2
* jgr17082300 Setting changes for HW41801 HW419305John Rell2017-09-121-0/+18
* disable lpc_ed in fbc to match mc settingdchowe2017-09-121-0/+25
* Add perf inits: HW418850,HW418789; Add clockgate issue HW418738Nick Klazynski2017-09-121-0/+72
* resolve Zeppelin DMI channel framelock issuesJoe McGill2017-09-123-1/+38
* Mistakenly pulled workaround for HW410212 - readd for CDD1.0Nick Klazynski2017-09-121-1/+8
* Reverting chickenswitches for issues fixed in Cumulus DD1.0Nick Klazynski2017-09-121-58/+9
* Update core initfiles for Cumulus DD1.0Nick Klazynski2017-09-121-50/+414
* Modified gen_accessors script for greater supportAndre Marin2017-09-121-0/+18
* Use DD1 SW reset for XIVE unit until we get HW reset working in DD2crgeddes2017-09-121-0/+18
* p9.int.scom.initfile -- mask SUE FIR for Nimbus DD2Joe McGill2017-09-121-0/+17
* Add additional dials to risklevelNick Klazynski2017-09-121-0/+17
* Remove reset_dll from scominit, enable delay line tap pointsAndre Marin2017-09-121-3/+20
* p9.npu.scom.initfile -- FIR updates to align with RAS XML documentationJoe McGill2017-09-121-0/+35
* TP, Nest FIR updates -- DD2 updates to match RAS XMLJoe McGill2017-09-121-0/+17
* GPTR/Overlays stage-2 supportSumit Kumar2017-09-121-2/+2
* p9_sbe_tracearray: Nimbus DD2 updatesJoachim Fenkes2017-09-121-0/+18
* Create dmi.pll.scan.initfileBen Gass2017-09-121-0/+17
* Add WA for HW415988Nick Klazynski2017-09-121-0/+19
* HW414700 checkstop on UEs and disable core ECC counterLuke C. Murray2017-09-121-0/+18
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