SBE move import`

Change-Id: I726951318cdb19fd445af2f7910e0d6872eff18c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29086
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>

1 files changed, 525 insertions, 0 deletions

diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
new file mode 100644
index 00000000..4972e342
--- /dev/null
+++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
@@ -0,0 +1,525 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml $ -->
+<!--                                                                        -->
+<!-- OpenPOWER sbe Project                                                  -->
+<!--                                                                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2015,2016                        -->
+<!-- [+] International Business Machines Corp.                              -->
+<!--                                                                        -->
+<!--                                                                        -->
+<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
+<!-- you may not use this file except in compliance with the License.       -->
+<!-- You may obtain a copy of the License at                                -->
+<!--                                                                        -->
+<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
+<!--                                                                        -->
+<!-- Unless required by applicable law or agreed to in writing, software    -->
+<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
+<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
+<!-- implied. See the License for the specific language governing           -->
+<!-- permissions and limitations under the License.                         -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- p9_sbe_attributes.xml -->
+<!--    This file defines the subset of attributes from the larger pool of  -->
+<!--    defined attributes that will be included in the SBE platform.       -->
+<!--    Additionally, build time initial values can also be optionally      -->
+<!--    defined.                                                            -->
+<entries>
+  <!-- ********************************************************************* -->
+  <entry>
+    <name>ATTR_PIBMEM_REPAIR0</name>
+    <value>0x0000000000000000</value>
+  </entry>
+  <entry>
+    <name>ATTR_PIBMEM_REPAIR1</name>
+    <value>0x0000000000000000</value>
+  </entry>
+  <entry>
+    <name>ATTR_PIBMEM_REPAIR2</name>
+    <value>0x0000000000000000</value>
+  </entry>
+  <entry>
+    <name>ATTR_I2C_BUS_DIV_REF</name>
+    <value>0x0001</value>
+  </entry>
+  <entry>
+    <name>ATTR_FUNCTIONAL_EQ_EC_VALID</name>
+    <value>0x00</value>
+  </entry>
+  <entry>
+    <name>ATTR_EQ_GARD</name>
+    <value>0x01</value>
+  </entry>
+  <entry>
+     <name>ATTR_EC_GARD</name>
+     <value>0x01</value>
+  </entry>
+  <entry>
+    <name>ATTR_I2C_BUS_DIV_REF_VALID</name>
+    <value>0x00</value>
+  </entry>
+  <entry>
+     <name>ATTR_IS_MPIPL</name>
+     <value>0x0</value>
+  </entry>
+  <entry>
+     <name>ATTR_BOOT_FREQUENCY_VALID</name>
+     <value>0x00</value>
+  </entry>
+  <entry>
+     <name>ATTR_NEST_PLL_BUCKET</name>
+     <value>0x05</value>
+  </entry>
+  <entry>
+     <name>ATTR_BOOT_FREQ_MULT</name>
+     <value>0x00B4</value>
+  </entry>
+  <entry>
+     <name>ATTR_HWP_CONTROL_FLAGS_VALID</name>
+     <value>0x00</value>
+  </entry>
+  <entry>
+      <name>ATTR_SYSTEM_IPL_PHASE</name>
+      <value>0x1</value>
+  </entry>
+  <entry>
+      <name>ATTR_RISK_LEVEL</name>
+      <value>0x0</value>
+  </entry>
+  <entry>
+      <name>ATTR_DISABLE_HBBL_VECTORS</name>
+      <value>0x1</value>
+  </entry>
+  <entry>
+      <name>ATTR_CHIP_SELECTION_VALID</name>
+      <value>0x0</value>
+  </entry>
+  <entry>
+      <name>ATTR_CHIP_SELECTION</name>
+      <value>0x1</value>
+  </entry>
+  <entry>
+     <name>ATTR_NODE_POS</name>
+     <value>0x01</value>
+  </entry>
+  <entry>
+     <name>ATTR_CHIP_POS</name>
+     <value>0x01</value>
+  </entry> 
+  <entry>
+    <name>ATTR_SCRATCH_UINT8_1</name>
+    <value>0x8</value>
+  </entry>
+  <entry>
+    <name>ATTR_SCRATCH_UINT8_2</name>
+  </entry>
+  <entry>
+    <name>ATTR_SCRATCH_UINT32_1</name>
+  </entry>
+  <entry>
+    <name>ATTR_SCRATCH_UINT32_2</name>
+    <value>0xaffeaffe</value>
+  </entry>
+  <entry>
+    <name>ATTR_SCRATCH_UINT64_1</name>
+  </entry>
+  <entry>
+    <name>ATTR_SCRATCH_UINT64_2</name>
+  </entry>
+  <entry>
+    <name>ATTR_SCRATCH_INT8_1</name>
+  </entry>
+  <entry>
+    <name>ATTR_SCRATCH_INT8_2</name>
+  </entry>
+  <entry>
+    <name>ATTR_SCRATCH_INT32_1</name>
+  </entry>
+  <entry>
+    <name>ATTR_SCRATCH_INT32_2</name>
+  </entry>
+  <entry>
+    <name>ATTR_SCRATCH_INT64_1</name>
+  </entry>
+  <entry>
+    <name>ATTR_SCRATCH_INT64_2</name>
+  </entry>
+  <entry>
+    <name>ATTR_SCRATCH_UINT32_ARRAY</name>
+  </entry>
+  <entry>
+    <name>ATTR_SCRATCH_UINT32_PERV_ARRAY</name>
+  </entry>
+   <entry>
+    <name>ATTR_REPR_RING</name>
+    <value>0xcafe</value>
+    <value>0xdead</value>
+  </entry>
+  <entry>
+    <name>ATTR_TIME_RING</name>
+  </entry>
+  <entry>
+    <name>ATTR_GPTR_RING</name>
+    <value>0xcafe</value>
+    <value>0xaffe</value>
+  </entry>
+  <entry>
+    <name>ATTR_PLL_RING</name>
+  </entry>
+  <entry>
+    <name>ATTR_CORE_REPR_RING</name>
+  </entry>
+  <entry>
+    <name>ATTR_CORE_TIME_RING</name>
+  </entry>
+  <entry>
+    <name>ATTR_CORE_GPTR_RING</name>
+  </entry>
+  <entry>
+    <name>ATTR_L2_REPR_RING</name>
+  </entry>
+  <entry>
+    <name>ATTR_L2_TIME_RING</name>
+    <value>0xcafe</value>
+    <value>0xaffe</value>
+  </entry>
+  <entry>
+    <name>ATTR_L2_GPTR_RING</name>
+  </entry>
+  <entry>
+    <name>ATTR_L3_REPR_RING</name>
+  </entry>
+  <entry>
+    <name>ATTR_L3_TIME_RING</name>
+    <value>0xcafe</value>
+    <value>0xaffe</value>
+  </entry>
+  <entry>
+    <name>ATTR_L3_GPTR_RING</name>
+  </entry>
+  <entry>
+    <name>ATTR_DPLL_RING</name>
+  </entry>
+  <entry>
+      <name>ATTR_CHIP_UNIT_POS</name>
+      <value>0x01</value> <!-- PERV -->
+      <value>0x02</value> <!-- N0 -->
+      <value>0x03</value> <!-- N1 -->
+      <value>0x04</value> <!-- N2 -->
+      <value>0x05</value> <!-- N3 -->
+      <value>0x06</value> <!-- XB -->
+      <value>0x07</value> <!-- MC01 -->
+      <value>0x08</value> <!-- MC23 -->
+      <value>0x09</value> <!-- OB0 -->
+      <value>0x0A</value> <!-- OB1 -->
+      <value>0x0B</value> <!-- OB2 -->
+      <value>0x0C</value> <!-- OB3 -->
+      <value>0x0D</value> <!-- PCI0 -->
+      <value>0x0E</value> <!-- PCI1 -->
+      <value>0x0F</value> <!-- PCI2 -->
+      <value>0x10</value> <!-- EP0 -->
+      <value>0x11</value> <!-- EP1 -->
+      <value>0x12</value> <!-- EP2 -->
+      <value>0x13</value> <!-- EP3 -->
+      <value>0x14</value> <!-- EP4 -->
+      <value>0x15</value> <!-- EP5 -->
+      <value>0x20</value> <!-- EC00 -->
+      <value>0x21</value> <!-- EC01 -->
+      <value>0x22</value> <!-- EC02 -->
+      <value>0x23</value> <!-- EC03 -->
+      <value>0x24</value> <!-- EC04 -->
+      <value>0x25</value> <!-- EC05 -->
+      <value>0x26</value> <!-- EC06 -->
+      <value>0x27</value> <!-- EC07 -->
+      <value>0x28</value> <!-- EC08 -->
+      <value>0x29</value> <!-- EC09 -->
+      <value>0x2A</value> <!-- EC10 -->
+      <value>0x2B</value> <!-- EC11 -->
+      <value>0x2C</value> <!-- EC12 -->
+      <value>0x2D</value> <!-- EC13 -->
+      <value>0x2E</value> <!-- EC14 -->
+      <value>0x2F</value> <!-- EC15 -->
+      <value>0x30</value> <!-- EC16 -->
+      <value>0x31</value> <!-- EC17 -->
+      <value>0x32</value> <!-- EC18 -->
+      <value>0x33</value> <!-- EC19 -->
+      <value>0x34</value> <!-- EC20 -->
+      <value>0x35</value> <!-- EC21 -->
+      <value>0x36</value> <!-- EC22 -->
+      <value>0x37</value> <!-- EC23 -->
+  </entry>
+
+  <entry>
+      <name>ATTR_BACKUP_SEEPROM_SELECT</name>
+      <value>0x0</value>
+  </entry>
+  <entry>
+       <name>ATTR_MC_SYNC_MODE</name>
+       <value>0x01</value>
+  </entry>
+  <entry>
+         <name>ATTR_BOOT_FLAGS</name>
+         <value>0x80000000</value>
+  </entry>
+  <entry>
+         <name>ATTR_BOOT_FREQ</name>
+         <value>0x0</value>
+  </entry>
+  <entry>
+          <name>ATTR_VCS_BOOT_VOLTAGE</name>
+          <value>0x0</value>
+  </entry>
+  <entry>
+           <name>ATTR_VDD_BOOT_VOLTAGE</name>
+           <value>0x0</value>
+  </entry>
+  <entry>
+      <!-- The values here are per pervasive chiplet in the order of the chiplet
+      numbers Bit 3 (in the 16-bit representation) is used to indicate
+      partial good. If this bit is 1, the region is bad, else it is good.
+      Bits 0,1,2 are don't care. For nimbus, pervasive chiplets 10 and 11 are
+      not used (OB1 and OB2), therefore the value for them is 0xFFFF -->
+            <name>ATTR_PG</name>
+            <value>0xE07D</value> <!-- PERV -->
+            <value>0xE03F</value> <!-- N0 -->
+            <value>0xE03F</value> <!-- N1 -->
+            <value>0xE03F</value> <!-- N2 -->
+            <value>0xE01F</value> <!-- N3 -->
+            <value>0xE00D</value> <!-- XB -->
+            <value>0xE0FD</value> <!-- MC01 -->
+            <value>0xE0FD</value> <!-- MC23 -->
+            <value>0xE1FD</value> <!-- OB0 -->
+            <value>0xFFFF</value> <!-- OB1 -->
+            <value>0xFFFF</value> <!-- OB2 -->
+            <value>0xE1FD</value> <!-- OB3 -->
+            <value>0xE1FD</value> <!-- PCI0 -->
+            <value>0xE0FD</value> <!-- PCI1 -->
+            <value>0xE07D</value> <!-- PCI2 -->
+            <value>0xE001</value> <!-- EP0 -->
+            <value>0xE001</value> <!-- EP1 -->
+            <value>0xE001</value> <!-- EP2 -->
+            <value>0xE288</value> <!-- EP3 -->
+            <value>0xE001</value> <!-- EP4 -->
+            <value>0xE001</value> <!-- EP5 -->
+            <value>0xE1FF</value> <!-- EC00 -->
+            <value>0xE1FF</value> <!-- EC01 -->
+            <value>0xE1FF</value> <!-- EC02 -->
+            <value>0xE1FF</value> <!-- EC03 -->
+            <value>0xE1FF</value> <!-- EC04 -->
+            <value>0xE1FF</value> <!-- EC05 -->
+            <value>0xE1FF</value> <!-- EC06 -->
+            <value>0xE1FF</value> <!-- EC07 -->
+            <value>0xE1FF</value> <!-- EC08 -->
+            <value>0xE1FF</value> <!-- EC09 -->
+            <value>0xE1FF</value> <!-- EC10 -->
+            <value>0xE1FF</value> <!-- EC11 -->
+            <value>0xE1FF</value> <!-- EC12 -->
+            <value>0xE1FF</value> <!-- EC13 -->
+            <value>0xE1FF</value> <!-- EC14 -->
+            <value>0xE1FF</value> <!-- EC15 -->
+            <value>0xE1FF</value> <!-- EC16 -->
+            <value>0xE1FF</value> <!-- EC17 -->
+            <value>0xE1FF</value> <!-- EC18 -->
+            <value>0xE1FF</value> <!-- EC19 -->
+            <value>0xE1FF</value> <!-- EC20 -->
+            <value>0xE1FF</value> <!-- EC21 -->
+            <value>0xE1FF</value> <!-- EC22 -->
+            <value>0xE1FF</value> <!-- EC23 -->
+  </entry>
+  <entry>
+           <name>ATTR_ADU_XSCOM_BAR_BASE_ADDR</name>
+           <value>0x000603FC00000000</value>
+  </entry>
+  <entry>
+           <name>ATTR_LPC_BASE_ADDR</name>
+           <value>0x0006030000000000</value>
+  </entry>
+  <entry>
+         <name>ATTR_SUN_ID</name>
+         <value>0x01</value>
+  </entry>
+  <entry>
+         <name>ATTR_PROC_SBE_MASTER_CHIP</name>
+         <value>0x01</value>
+  </entry>
+  <entry>
+          <name>ATTR_PROC_FABRIC_SYSTEM_ID</name>
+          <value>0x00</value>
+  </entry>
+  <entry>
+          <name>ATTR_PROC_FABRIC_GROUP_ID</name>
+          <value>0x00</value>
+  </entry>
+  <entry>
+          <name>ATTR_PROC_FABRIC_CHIP_ID</name>
+          <value>0x00</value>
+  </entry>
+  <entry>
+          <name>ATTR_PROC_FABRIC_ADDR_BAR_MODE</name>
+          <value>0x01</value>
+  </entry>
+  <entry>
+          <name>ATTR_MEM_MIRROR_PLACEMENT_POLICY</name>
+          <value>0x00</value>
+  </entry>
+  <entry>
+          <name>ATTR_SBE_BOOTLOADER_OFFSET</name>
+          <value>0x200000</value>
+  </entry>
+  <entry>
+           <name>ATTR_HOSTBOOT_HRMOR_OFFSET</name>
+           <value>0x8000000</value>
+  </entry>
+  <entry>
+           <name>ATTR_SYS_FORCE_ALL_CORES</name>
+           <value>0x00</value>
+  </entry>
+  <entry>
+           <name>ATTR_MASTER_CORE</name>
+  </entry>
+  <entry>
+           <name>ATTR_MASTER_EX</name>
+  </entry>
+  <entry>
+           <name>ATTR_PNOR_SIZE</name>
+           <value>0x00</value>
+  </entry>
+  <entry>
+           <name>ATTR_PNOR_BOOT_SIDE</name>
+           <value>0x00</value>
+  </entry>
+  <entry>
+           <name>ATTR_SBE_BOOT_SIDE</name>
+           <value>0x00</value>
+  </entry>
+  <!-- TODO we need to change this once the absolute address is known -->
+  <entry>
+           <name>ATTR_SBE_HBBL_EXCEPTION_INSTRUCT</name>
+           <value>0x48000000</value>
+  </entry>
+  <entry>
+           <name>ATTR_CLOCK_PLL_MUX</name>
+           <value>0x80010800</value>
+  </entry>
+   <entry>
+           <name>ATTR_CLOCK_PLL_MUX0</name>
+           <value>0x3</value>
+  </entry>
+  <entry>
+  	<name>ATTR_PROC_EPS_READ_CYCLES_T0</name>
+  	<value>0x00000FFF</value>
+  </entry>
+  <entry>
+  	<name>ATTR_PROC_EPS_READ_CYCLES_T1</name>
+  	<value>0x00000FFF</value>
+  </entry>
+  <entry>
+  	<name>ATTR_PROC_EPS_READ_CYCLES_T2</name>
+  	<value>0x00000FFF</value>
+  </entry>
+  <entry>
+  	<name>ATTR_PROC_EPS_WRITE_CYCLES_T1</name>
+  	<value>0x00000FFF</value>
+  </entry>
+  <entry>
+  	<name>ATTR_PROC_EPS_WRITE_CYCLES_T2</name>
+  	<value>0x00000FFF</value>
+  </entry>
+  <entry>
+           <name>ATTR_SECURITY_MODE</name>
+           <value>0x0</value>
+  </entry>
+  <entry>
+           <name>ATTR_SECURITY_ENABLE</name>
+           <value>0x0</value>
+  </entry>
+  <entry>
+           <name>ATTR_PFET_OFF_CONTROLS</name>
+           <value>0x00000000</value>
+  </entry>
+  <entry>
+           <name>ATTR_OBUS_RATIO_VALUE</name>
+           <value>0x0</value>
+  </entry>
+  <entry>
+           <name>ATTR_ECID</name>
+  </entry>
+  <entry>
+           <name>ATTR_RUNN_MODE</name>
+           <value>0x0</value>
+  </entry>
+  <entry>
+           <name>ATTR_SS_FILTER_BYPASS</name>
+           <value>0x1</value>
+  </entry>
+  <entry>
+           <name>ATTR_CP_FILTER_BYPASS</name>
+           <value>0x1</value>
+  </entry>
+  <entry>
+           <name>ATTR_IO_FILTER_BYPASS</name>
+           <value>0x1</value>
+  </entry>
+  <entry>
+           <name>ATTR_VDM_ENABLE</name>
+           <value>0x0</value>
+  </entry>
+  <!-- See chip_attributes.xml for a description of ATTR_EC -->
+  <entry>
+           <name>ATTR_EC</name>
+           <!-- The value needs to be changed as per the EC level  -->
+           <value>0x10</value>
+  </entry>
+  <!-- See chip_attributes.xml for a description of ATTR_NAME -->
+  <entry>
+           <name>ATTR_NAME</name>
+           <!-- NIMBUS -->
+           <value>0x5</value>
+  </entry>
+<!--
+This is an example of how to add a CHIP EC feature attribute to this file
+The virtual tag indicates to the SBE plat to not attach storage in the
+attribute tank
+  <entry>
+           <name>ATTR_CHIP_EC_FEATURE_TEST1</name>
+           <virtual/>
+  </entry>
+-->
+
+<!-- Pervasive EC attributes -->
+  <entry>
+           <name>ATTR_CHIP_EC_FEATURE_FSI_GP_SHADOWS_OVERWRITE</name>
+           <virtual/>
+  </entry>
+  <entry>
+           <name>ATTR_CHIP_EC_FEATURE_N3_FLUSH_MODE</name>
+           <virtual/>
+  </entry>
+  <entry>
+           <name>ATTR_CHIP_EC_FEATURE_VITL_CLK_SETUP</name>
+            <virtual/>
+  </entry>
+  <entry>
+           <name>ATTR_CHIP_EC_FEATURE_SDISN_SETUP</name>
+           <virtual/>
+  </entry>
+  <entry>
+           <name>ATTR_CHIP_EC_FEATURE_VITL_CLOCK_GATING</name>
+           <virtual/>
+  </entry>
+
+  <entry>
+        <name>ATTR_PROC_XSCOM_BAR_BASE_ADDR_OFFSET</name>
+        <value>0x000003FC00000000</value>
+  </entry>
+
+  <entry>
+        <name>ATTR_PROC_LPC_BAR_BASE_ADDR_OFFSET</name>
+        <value>0x000003FB00000000</value>
+  </entry>
+
+
+</entries>