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author | Mike Baiocchi <mbaiocch@us.ibm.com> | 2017-05-30 07:40:20 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-06-07 00:02:06 -0400 |
commit | f3be129ba3c9be22c90c5502a2317ac284ffe5df (patch) | |
tree | 7fbb98a61780c791959f63c2a0482c741ecf4445 /src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml | |
parent | e7bc187c7d48108c96391122975e2be3c20d7d3f (diff) | |
download | talos-sbe-f3be129ba3c9be22c90c5502a2317ac284ffe5df.tar.gz talos-sbe-f3be129ba3c9be22c90c5502a2317ac284ffe5df.zip |
Check Scratch Register 3 bit 7 and set new ATTR_SECURE_SETTINGS
Change-Id: Ia125ce6fdf5a15acf30a11e3124fae86c645d96c
RTC:163094
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41107
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41110
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index e00c1e77..6558a63b 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -253,6 +253,10 @@ <name>ATTR_SBE_BOOT_SIDE</name> <value>0x00</value> </entry> + <entry> + <name>ATTR_SECURE_SETTINGS</name> + <value>0x00</value> + </entry> <!-- TODO we need to change this once the absolute address is known --> <entry> <name>ATTR_SBE_HBBL_EXCEPTION_INSTRUCT</name> |