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path: root/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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* Adds code to PPC ISEL lowering to recognize half-word inserts from vector_shu...Graham Yiu2017-11-011-0/+119
* [PowerPC] Eliminate sign- and zero-extensions if already sign- or zero-extendedHiroshi Inoue2017-10-161-0/+4
* DAG: Add opcode and source type to isFPExtFreeMatt Arsenault2017-10-131-2/+3
* [PowerPC] Don't use xscvdpspn on the P7Hal Finkel2017-09-061-3/+6
* [PPC][NFC] Renaming things with 'xxinsert' moniker to 'vecinsert' to make it ...Tony Jiang2017-09-051-4/+4
* [PPC] Refine checks for emiting TOC restore nop and tail-call eligibility.Sean Fertile2017-08-211-6/+17
* [PowerPC] Don't crash on larger splats achieved through 1-byte splatsNemanja Ivanovic2017-08-081-0/+9
* Delete Default and JITDefault code modelsRafael Espindola2017-08-031-2/+0
* [Power9] Exploit vector absolute difference instructions on Power 9Stefan Pintilie2017-08-021-1/+37
* Change CallLoweringInfo::CS to be an ImmutableCallSite instead of a pointer. ...Peter Collingbourne2017-07-261-14/+14
* [SystemZ, LoopStrengthReduce]Jonas Paulsson2017-07-211-1/+1
* [PowerPC] Ensure displacements for DQ-Form instructions are multiples of 16Nemanja Ivanovic2017-07-131-9/+9
* [PPC CodeGen] Expand the bitreverse.i64 intrinsic.Tony Jiang2017-07-101-0/+1
* [PowerPC] Reduce register pressure by not materializing a constant just for u...Lei Huang2017-07-101-4/+9
* fix typos in comments and error messages; NFCHiroshi Inoue2017-07-101-3/+3
* [PowerPC] NFC : Common up definitions of isIntS16Immediate and update paramet...Lei Huang2017-07-071-7/+7
* [PPC CodeGen] Expand the bitreverse.i32 intrinsic.Tony Jiang2017-07-071-0/+3
* [PowerPC] Fix -Wimplicit-fallthrough warnings. NFCI.Simon Pilgrim2017-07-071-0/+4
* [Power9] Exploit vector integer extend instructions when indices aren't correct.Tony Jiang2017-07-051-0/+136
* Tidy up some calls to getRegister for readability.Eric Christopher2017-06-171-5/+6
* Test commit - NFC.Lei Huang2017-06-141-1/+1
* Test commit - NFC.Kit Barton2017-06-131-1/+1
* PPCISelLowering.cpp: Fix warnings in r305214. [-Wdocumentation]NAKAMURA Takumi2017-06-131-3/+3
* [PowerPC] Match vec_revb builtins to P9 instructions.Tony Jiang2017-06-121-7/+69
* [Power9] Added support for the modsw, moduw, modsd, modud hardware instructions.Tony Jiang2017-06-121-5/+32
* [DAG] add helper to bind memop chains; NFCISanjay Patel2017-06-121-0/+1
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-5/+5
* [PPC] Inline expansion of memcmpZaara Syeda2017-05-311-0/+4
* [PowerPC] Fix a performance bug for PPC::XXPERMDI.Tony Jiang2017-05-311-12/+94
* [SelectionDAG] Set ISD::FPOWI to Expand by defaultCraig Topper2017-05-301-3/+0
* [PPC] Add text for assert.Tim Shen2017-05-251-1/+1
* [PPC] Fix atomics lowering in DAG lowering.Tim Shen2017-05-251-1/+3
* [PowerPC] Fix a performance bug for PPC::XXSLDWI.Tony Jiang2017-05-241-2/+86
* CodeGen: Power: Add lowering for shifts of v1i128.Kyle Butt2017-05-171-0/+15
* [PPC] Lower load acquire/seq_cst trailing fence to cmp + bne + isync.Tim Shen2017-05-161-5/+40
* [PPC] Move the combine "a << (b % (sizeof(a) * 8)) -> (PPCshl a, b)" to the b...Tim Shen2017-05-121-0/+64
* [Atomic] Remove IsStore/IsLoad in the interface, and pass the instruction ins...Tim Shen2017-05-091-7/+7
* Add extra operand to CALLSEQ_START to keep frame part set up previouslySerge Pavlov2017-05-091-12/+8
* [KnownBits] Add wrapper methods for setting and clear all bits in the underly...Craig Topper2017-05-051-1/+1
* [PowerPC] Emit VMX loads/stores for aligned ops to avoid adding swaps on LENemanja Ivanovic2017-05-021-0/+15
* Generalize the specialized flag-carrying SDNodes by moving flags into SDNode.Amara Emerson2017-05-011-5/+5
* [SelectionDAG] Use KnownBits struct in DAG's computeKnownBits and simplifyDem...Craig Topper2017-04-281-24/+20
* Move value type list from TargetRegisterClass to TargetRegisterInfoKrzysztof Parzyszek2017-04-241-2/+2
* Revert r301231: Accidentally committed stale filesKrzysztof Parzyszek2017-04-241-2/+2
* Move value type list from TargetRegisterClass to TargetRegisterInfoKrzysztof Parzyszek2017-04-241-2/+2
* [DAGCombiner] Add vector demanded elements support to computeKnownBitsForTarg...Simon Pilgrim2017-03-311-0/+1
* Kill some trailing whitespace to make some new changes a bit easier.Eric Christopher2017-03-231-12/+12
* Make library calls sensitive to regparm module flag (Fixes PR3997).Nirav Dave2017-03-181-4/+3
* Remove getArgumentList() in favor of arg_begin(), args(), etcReid Kleckner2017-03-161-1/+1
* Test commit.Hiroshi Inoue2017-03-161-1/+1
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