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| author | Tim Shen <timshen91@gmail.com> | 2017-05-25 22:58:35 +0000 |
|---|---|---|
| committer | Tim Shen <timshen91@gmail.com> | 2017-05-25 22:58:35 +0000 |
| commit | a2b85da879b5da371d4300aa102d36da53354b73 (patch) | |
| tree | cf85c171470037897b39e43be432d4f58969cdfb /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | 883dbc43d9b3f939c129d557833989c61dbae27d (diff) | |
| download | bcm5719-llvm-a2b85da879b5da371d4300aa102d36da53354b73.tar.gz bcm5719-llvm-a2b85da879b5da371d4300aa102d36da53354b73.zip | |
[PPC] Fix atomics lowering in DAG lowering.
I forgot to forward the chain, causing some missing instruction
dependencies. The test crashes the compiler without this patch.
Inspired by the test case, D33519 also tries to remove the extra sync.
Differential Revision: https://reviews.llvm.org/D33573
llvm-svn: 303931
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 2f64a3f4eb5..7fde1238640 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -8296,10 +8296,12 @@ SDValue PPCTargetLowering::LowerINTRINSIC_VOID(SDValue Op, SDLoc DL(Op); switch (cast<ConstantSDNode>(Op.getOperand(ArgStart))->getZExtValue()) { case Intrinsic::ppc_cfence: { + assert(ArgStart == 1); assert(Subtarget.isPPC64() && "Only 64-bit is supported for now."); return SDValue(DAG.getMachineNode(PPC::CFENCE8, DL, MVT::Other, DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, - Op.getOperand(ArgStart + 1))), + Op.getOperand(ArgStart + 1)), + Op.getOperand(0)), 0); } default: |
