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| author | Tony Jiang <jtony@ca.ibm.com> | 2017-07-07 16:41:55 +0000 |
|---|---|---|
| committer | Tony Jiang <jtony@ca.ibm.com> | 2017-07-07 16:41:55 +0000 |
| commit | c260e0eb565ffd75dd4781dad5e46397abe28fec (patch) | |
| tree | 72692b9793c0fed6dcea929221818052dbe71e1e /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | 6687318babb9477e56e04df73bf8a4abb68b263a (diff) | |
| download | bcm5719-llvm-c260e0eb565ffd75dd4781dad5e46397abe28fec.tar.gz bcm5719-llvm-c260e0eb565ffd75dd4781dad5e46397abe28fec.zip | |
[PPC CodeGen] Expand the bitreverse.i32 intrinsic.
Differential Revision: https://reviews.llvm.org/D33572
Fix PR: https://bugs.llvm.org/show_bug.cgi?id=33093
llvm-svn: 307413
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index d1101126ad6..e76d61aacdf 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -136,6 +136,9 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, addRegisterClass(MVT::f64, &PPC::F8RCRegClass); } + // Match BITREVERSE to customized fast code sequence in the td file. + setOperationAction(ISD::BITREVERSE, MVT::i32, Legal); + // PowerPC has an i16 but no i8 (or i1) SEXTLOAD. for (MVT VT : MVT::integer_valuetypes()) { setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); |
