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path: root/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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* [PowerPC] Unaligned FP default should apply to scalars onlyNemanja Ivanovic2020-06-231-1/+2
* [PowerPC] Prevent legalization loop from promoting SELECT_CC from v4i32 to v4i32Nemanja Ivanovic2020-06-221-0/+1
* [PowerPC] Add missing handling for half precisionTom Stellard2020-06-221-0/+23
* [PowerPC] Do not attempt to reuse load for 64-bit FP_TO_UINT without FPCVTNemanja Ivanovic2020-05-191-2/+3
* [PowerPC] Don't generate ST_VSR_SCAL_INT if power8-vector is disabledKai Luo2020-04-221-1/+1
* [PowerPC] Update alignment for ReuseLoadInfo in LowerFP_TO_INTForReuseKai Luo2020-04-161-2/+5
* [AIX] ExternalSymbolSDNode loweringXiangling Liao2020-01-141-24/+64
* [AIX] Allow vararg calls when all arguments reside in registersjasonliu2020-01-101-22/+85
* CodeGen: Use LLT instead of EVT in getRegisterByNameMatt Arsenault2020-01-091-4/+3
* [PowerPC][NFC] Rename record instructions to use _rec suffix instead of oJinsong Ji2020-01-061-15/+16
* Move tail call disabling code to target independent codeReid Kleckner2020-01-031-6/+1
* [PowerPC][AIX] Enable sret arguments.Sean Fertile2020-01-021-3/+0
* [PowerPC] Only legalize FNEARBYINT with unsafe fp mathNemanja Ivanovic2020-01-021-2/+7
* [PowerPC][NFC] Fix clang-tidy warningJinsong Ji2019-12-311-5/+5
* [PowerPC] Legalize rounding nodesNemanja Ivanovic2019-12-301-0/+15
* [PowerPC] Change default for unaligned FP access for older subtargetsNemanja Ivanovic2019-12-281-0/+3
* Delete llvm.{sig,}{setjmp,longjmp} remnant after r136821Fangrui Song2019-12-271-4/+0
* [Power9] Remove the PPCISD::XXREVERSE as it has completely the same semantics...QingShan Zhang2019-12-231-6/+5
* [PowerPC] Exploit `vrl(b|h|w|d)` to perform vector rotationKai Luo2019-12-231-0/+8
* [PPC32] Emit R_PPC_PLTREL24 for calls to dso_local ifuncFangrui Song2019-12-201-2/+3
* [PowerPC] Only use PLT annotations if using PIC relocation modelJustin Hibbits2019-12-191-1/+7
* [PowerPC][NFC] Refactor splat of constant to vector.Stefan Pintilie2019-12-181-25/+4
* [PowerPC] Add missing legalization for vector BSWAPNemanja Ivanovic2019-12-171-1/+4
* [PowerPC] Add Support for indirect calls on AIX.Sean Fertile2019-12-131-30/+69
* [IR] Split out target specific intrinsic enums into separate headersReid Kleckner2019-12-111-0/+1
* [NFC][PowerPC] Remove the dead conditions in the if(cond)QingShan Zhang2019-12-111-5/+1
* [NFC] Add { } to silence compiler warning [-Wmissing-braces].Huihui Zhang2019-12-091-1/+1
* [PowerPC][NFC] Rename ANDI(S)o8 to ANDI(S)8oJinsong Ji2019-12-091-1/+1
* [PowerPC] Refactor FinishCall. [NFC]Sean Fertile2019-12-091-309/+334
* [PowerPC][AIX] Add support for lowering int/float/double formal arguments.Sean Fertile2019-11-291-3/+115
* [PowerPC] Add new Future CPU for PowerPC in LLVMStefan Pintilie2019-11-271-1/+4
* [XCOFF][AIX] Check linkage on the function, and two fixes for commentsjasonliu2019-11-261-7/+11
* [PowerPC] Rename DarwinDirective to CPUDirective (NFC)Kit Barton2019-11-251-7/+7
* [PowerPC] Fix VSX clobbers of CSR registersNemanja Ivanovic2019-11-251-0/+11
* [AIX][XCOFF] Generate undefined symbol in symbol table for external function ...jasonliu2019-11-251-2/+14
* [PowerPC] Implement the vector extend sign instruction pattern matchQingShan Zhang2019-11-221-0/+8
* [AIX] Lowering jump table, constant pool and block address in asmXiangling Liao2019-11-201-3/+3
* DAG: Add function context to isFMAFasterThanFMulAndFAddMatt Arsenault2019-11-191-1/+2
* [PowerPC] Option for enabling absolute jumptables with command lineNemanja Ivanovic2019-11-071-0/+5
* [AIX] Lowering CPI/JTI/BA to MIRXiangling Liao2019-10-301-6/+6
* [PowerPC] Emit scalar fp min/max instructionsNemanja Ivanovic2019-10-281-7/+35
* [AIX] Refactor AIX Call Lowering to use CCState. NFCI.Sean Fertile2019-10-281-94/+120
* [NFC] Replace 'isDarwin' with 'IsDarwin'Xiangling Liao2019-10-061-3/+3
* TLI: Remove DAG argument from getRegisterByNameMatt Arsenault2019-10-011-6/+6
* [Alignment][NFC] Remove unneeded llvm:: scoping on Align typesGuillaume Chatelet2019-09-271-8/+8
* Move classes into anonymous namespaces. NFC.Benjamin Kramer2019-09-221-1/+1
* [NFC][PowerPC] Refactor classifyGlobalReferenceJinsong Ji2019-09-201-8/+2
* [Alignment][NFC] Use Align::None instead of 1Guillaume Chatelet2019-09-181-4/+4
* [PowerPC] Exploit single instruction load-and-splat for word and doublewordNemanja Ivanovic2019-09-171-8/+89
* [SVE][MVT] Fixed-length vector MVT rangesGraham Hunter2019-09-171-2/+2
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