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| author | Tim Shen <timshen91@gmail.com> | 2017-05-25 23:40:46 +0000 |
|---|---|---|
| committer | Tim Shen <timshen91@gmail.com> | 2017-05-25 23:40:46 +0000 |
| commit | a76f20c3642e44f31704e56e8e46cecc0b08afcd (patch) | |
| tree | 036ee33abb3682e160ef979369fa21e0e376a024 /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | f87197ad91857bd26948ada2215627b15889dfb0 (diff) | |
| download | bcm5719-llvm-a76f20c3642e44f31704e56e8e46cecc0b08afcd.tar.gz bcm5719-llvm-a76f20c3642e44f31704e56e8e46cecc0b08afcd.zip | |
[PPC] Add text for assert.
llvm-svn: 303940
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 7fde1238640..b90a5ee2834 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -8296,7 +8296,7 @@ SDValue PPCTargetLowering::LowerINTRINSIC_VOID(SDValue Op, SDLoc DL(Op); switch (cast<ConstantSDNode>(Op.getOperand(ArgStart))->getZExtValue()) { case Intrinsic::ppc_cfence: { - assert(ArgStart == 1); + assert(ArgStart == 1 && "llvm.ppc.cfence must carry a chain argument."); assert(Subtarget.isPPC64() && "Only 64-bit is supported for now."); return SDValue(DAG.getMachineNode(PPC::CFENCE8, DL, MVT::Other, DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, |
