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path: root/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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* [Power9]Legalize and emit code for quad-precision convert from single-precisionLei Huang2018-07-051-0/+3
* [Power9] Implement float128 parameter passing and return valuesLei Huang2018-07-051-3/+8
* [Power9]Legalize and emit code for round & convert quad-precision valuesLei Huang2018-07-041-0/+4
* [PowerPC] Fix label address calculation for ppc32Strahinja Petrovic2018-06-191-3/+4
* [PowerPC] fix trivial typos in comment, NFCHiroshi Inoue2018-06-131-2/+2
* Set ADDE/ADDC/SUBE/SUBC to expand by defaultAmaury Sechet2018-06-011-0/+9
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-9/+9
* [Power9]Legalize and emit code for truncate and convert QP to DWLei Huang2018-05-081-0/+5
* [PowerPC] Unify handling for conversion of FP_TO_INT feeding a storeLei Huang2018-05-081-52/+77
* Commit r331416 breaks the big-endian PPC bot. On the big endian build, weNemanja Ivanovic2018-05-031-0/+3
* [PowerPC] Implement isMaskAndCmp0FoldingBeneficialNemanja Ivanovic2018-05-021-0/+14
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-8/+8
* [NFC] Move verificaiton check for f128 conversion into LowerINT_TO_FP()Lei Huang2018-04-161-24/+14
* [Power9]Legalize and emit code for converting (Un)Signed DWord to Quad-PrecisionLei Huang2018-04-121-1/+6
* [Power9]Legalize and emit code for quad-precision fma instructionsLei Huang2018-04-041-0/+3
* [IR][CodeGen] Remove dependency on EVT from IR/Function.cpp. Move EVT to Code...Craig Topper2018-03-291-1/+1
* [Power9]Legalize and emit code for quad-precision convert from double-precisionLei Huang2018-03-261-5/+12
* Fix layering by moving ValueTypes.h from CodeGen to IRDavid Blaikie2018-03-231-1/+1
* Fix layering of MachineValueType.h by moving it from CodeGen to SupportDavid Blaikie2018-03-231-1/+1
* [PowerPC][LegalizeFloatTypes] Move the PPC hacks for (i32 fp_to_sint/fp_to_ui...Craig Topper2018-03-201-22/+44
* [PowerPC][Power9]Legalize and emit code for quad-precision add/div/mul/subLei Huang2018-03-191-0/+7
* [PPC] Avoid non-simple MVT in STBRX optimizationGuozhi Wei2018-03-151-1/+5
* [PowerPC][NFC] formatting-only fixLei Huang2018-03-151-16/+15
* [TargetLowering] Rename DAGCombinerInfo::isAfterLegalizeVectorOps to DAGCombi...Craig Topper2018-03-061-1/+1
* [TLS] use emulated TLS if the target supports only this modeChih-Hung Hsieh2018-02-281-1/+1
* [PowerPC] Reduce stack frame for fastcc functions by only allocating paramete...Lei Huang2018-02-201-2/+11
* Re-commit : [PowerPC] Add handling for ColdCC calling convention and a pass t...Zaara Syeda2018-01-301-3/+14
* [PPC] Avoid incorrect fp-i128-fp lowering.Tim Shen2018-01-231-2/+4
* Revert [PowerPC] This reverts commit rL322721Zaara Syeda2018-01-171-14/+3
* [PowerPC] Add handling for ColdCC calling convention and a pass to markZaara Syeda2018-01-171-3/+14
* [PowerPC] Zero-extend the compare operand for ATOMIC_CMP_SWAPNemanja Ivanovic2018-01-121-0/+43
* [PowerPC] Add an ISD::TRUNCATE to the legalization for ppc_is_decremented_ctr...Craig Topper2018-01-071-1/+1
* [PowerPC] fix a bug in TCO eligibility checkHiroshi Inoue2017-12-301-6/+29
* [PowerPC] Fix parest build failure in SPEC2017.Tony Jiang2017-12-211-5/+6
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-15/+15
* Fix code causing fallthrough warnings in the PPC back end.Nemanja Ivanovic2017-12-151-0/+1
* TLI: Allow using PSV for intrinsic mem operandsMatt Arsenault2017-12-141-0/+1
* DAG: Expose all MMO flags in getTgtMemIntrinsicMatt Arsenault2017-12-141-14/+6
* [PowerPC] Sign-extend negative constant storesNemanja Ivanovic2017-12-111-2/+6
* Temporarily revert "[PowerPC] Allow tail calls of fastcc functions from C Cal...Eric Christopher2017-12-071-10/+5
* [PowerPC] Allow tail calls of fastcc functions from C CallingConv functions.Sean Fertile2017-11-281-5/+10
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-2/+2
* [PPC] Change i32 constant in store instruction to i64Guozhi Wei2017-11-161-1/+16
* [PowerPC] Implement mayBeEmittedAsTailCall for PPCSean Fertile2017-11-151-0/+35
* [PowerPC] Split out the tailcall calling convention checks. NFC.Sean Fertile2017-11-151-11/+19
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-1/+1
* Use new vector insert half-word and byte instructions when we see inserteleme...Graham Yiu2017-11-071-3/+26
* Fix buildbot breakages from r317503. Add parentheses to assignment when usin...Graham Yiu2017-11-061-2/+2
* Adds code to PPC ISEL lowering to recognize byte inserts from vector_shuffles...Graham Yiu2017-11-061-2/+106
* [PPC] Use xxbrd to speed up bswap64Guozhi Wei2017-11-061-2/+23
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