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| author | Lei Huang <lei@ca.ibm.com> | 2018-05-08 18:23:31 +0000 |
|---|---|---|
| committer | Lei Huang <lei@ca.ibm.com> | 2018-05-08 18:23:31 +0000 |
| commit | c517e95bc6624dda0f8107adc90e497d3a63bb41 (patch) | |
| tree | e577c817dad8d4351d826613544f592ac1cbed6b /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | b719d1b5b0d427ed71d0bfa03491bf5263e41fe3 (diff) | |
| download | bcm5719-llvm-c517e95bc6624dda0f8107adc90e497d3a63bb41.tar.gz bcm5719-llvm-c517e95bc6624dda0f8107adc90e497d3a63bb41.zip | |
[Power9]Legalize and emit code for truncate and convert QP to DW
Legalize and emit code for:
* xscvqpsdz : VSX Scalar truncate & Convert Quad-Precision to Signed Dword
* xscvqpudz : VSX Scalar truncate & Convert Quad-Precision to Unsigned Dword
Differential Revision: https://reviews.llvm.org/D45553
llvm-svn: 331787
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index bbf0caea10c..abd7513a391 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -6930,6 +6930,11 @@ SDValue PPCTargetLowering::LowerFP_TO_INTDirectMove(SDValue Op, SDValue PPCTargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG, const SDLoc &dl) const { + + // FP to INT conversions are legal for f128. + if (EnableQuadPrecision && (Op->getOperand(0).getValueType() == MVT::f128)) + return Op; + // Expand ppcf128 to i32 by hand for the benefit of llvm-gcc bootstrap on // PPC (the libcall is not available). if (Op.getOperand(0).getValueType() == MVT::ppcf128) { |
