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* [X86][AVX] Add lowerShuffleAsLanePermuteAndSHUFP loweringSimon Pilgrim2020-01-111-0/+40
* [X86] Remove dead code from X86DAGToDAGISel::Select that is no longer needed ...Craig Topper2020-01-111-28/+0
* [X86] Simplify code by removing an unreachable condition. NFCICraig Topper2020-01-101-12/+2
* [X86] Preserve fpexcept property when turning strict_fp_extend and strict_fp_...Craig Topper2020-01-102-4/+37
* [X86][Disassembler] Simplify readPrefixesFangrui Song2020-01-101-43/+25
* [X86] Use ReplaceAllUsesWith instead of ReplaceAllUsesOfValueWith to simplify...Craig Topper2020-01-101-12/+2
* [AMDGPU] Remove unnecessary v_mov from a register to itself in WQM lowering.Michael Bedy2020-01-101-5/+22
* [TargetLowering][ARM][Mips][WebAssembly] Remove the ordered FP compare from R...Craig Topper2020-01-104-17/+4
* [AArch64] Don't generate libcalls for wide shifts on DarwinJessica Paquette2020-01-101-1/+1
* Let targets adjust operand latency of bundlesStanislav Mekhanoshin2020-01-103-41/+28
* [AArch64] Add isAuthenticated predicate to MCInstDescVedant Kumar2020-01-102-6/+14
* [X86] Support function attribute "patchable-function-entry"Fangrui Song2020-01-101-3/+15
* [AArch64] Add function attribute "patchable-function-entry" to add NOPs at fu...Fangrui Song2020-01-101-0/+12
* [AIX] Allow vararg calls when all arguments reside in registersjasonliu2020-01-101-22/+85
* [X86][AVX] lowerShuffleAsLanePermuteAndShuffle - consistently normalize multi...Simon Pilgrim2020-01-101-2/+2
* [BPF] extend BTF_KIND_FUNC to cover global, static and extern funcsYonghong Song2020-01-103-29/+39
* [PowerPC] Handle constant zero bits in BitPermutationSelectorNemanja Ivanovic2020-01-101-4/+7
* AMDGPU/GlobalISel: Clamp G_ZEXT source sizesMatt Arsenault2020-01-101-2/+3
* [FPEnv] Invert sense of MIFlag::FPExcept flagUlrich Weigand2020-01-101-3/+3
* [ARM][MVE] Tail predicate VMAX,VMAXA,VMIN,VMINASam Parker2020-01-101-0/+2
* ARMLowOverheadLoops: a few more dbg msgs to better trace rejected TP loops. NFC.Sjoerd Meijer2020-01-101-7/+16
* Reverting, broke some bots. Need further investigation.Diogo Sampaio2020-01-107-336/+85
* [ARM][Thumb2] Fix ADD/SUB invalid writes to SPDiogo Sampaio2020-01-107-85/+336
* Fix "pointer is null" static analyzer warnings. NFCI.Simon Pilgrim2020-01-101-0/+1
* [MIR] Fix cyclic dependency of MIR formatterPeng Guo2020-01-101-4/+1
* [NFC] [PowerPC] Add isPredicable for basic instrsQiu Chaofan2020-01-104-34/+21
* [NFC] Style cleanupShengchen Kan2020-01-101-9/+10
* AMDGPU/GlobalISel: Select G_EXTRACT_VECTOR_ELTMatt Arsenault2020-01-095-10/+89
* AMDGPU/GlobalISel: Fix G_EXTRACT_VECTOR_ELT mapping for s-v caseMatt Arsenault2020-01-092-16/+87
* [AMDGPU] Fix bundle schedulingStanislav Mekhanoshin2020-01-093-0/+61
* AVR: Update for getRegisterByName changeMatt Arsenault2020-01-092-3/+3
* TableGen/GlobalISel: Add way for SDNodeXForm to work on timmMatt Arsenault2020-01-097-31/+68
* GlobalISel: Handle llvm.read_registerMatt Arsenault2020-01-091-0/+2
* CodeGen: Use LLT instead of EVT in getRegisterByNameMatt Arsenault2020-01-0920-23/+22
* [AArch64][GlobalISel] Implement selection of <2 x float> vector splat.Amara Emerson2020-01-092-7/+36
* AMDGPU/GlobalISel: Fix argument lowering for vectors of pointersMatt Arsenault2020-01-091-2/+18
* AMDGPU/GlobalISel: Widen 16-bit shift amount sourcesMatt Arsenault2020-01-091-1/+2
* MipsDelaySlotFiller: Update registers def-uses for BUNDLE instructionsAlex Richardson2020-01-091-2/+10
* [GlobalISel][AArch64] Import + select LDR*roW and STR*roW patternsJessica Paquette2020-01-092-46/+182
* [ms] [X86] Use "P" modifier on all branch-target operands in inline X86 assem...Eric Astor2020-01-094-50/+31
* [X86] AMD Znver2 (Rome) Scheduler enablementGanesh Gopalasubramanian2020-01-103-2/+1551
* [PowerPC] The VK_PLT symbolref modifier is only used on 32-bit ELF. [NFC]Sean Fertile2020-01-091-2/+2
* [SystemZ] Fix matching another pattern for nxgrk (PR44496)Ulrich Weigand2020-01-091-2/+3
* AMDGPU/GlobalISel: Fix import of integer med3Matt Arsenault2020-01-092-32/+30
* AMDGPU: Eliminate more legacy codepred address space PatFragsMatt Arsenault2020-01-094-93/+24
* AMDGPU: Use new PatFrag system for d16 storesMatt Arsenault2020-01-092-15/+9
* AMDGPU: Use new PatFrag system for d16 load nodesMatt Arsenault2020-01-091-32/+23
* AMDGPU/GlobalISel: Fix import of zext of s16 op patternsMatt Arsenault2020-01-092-3/+5
* AMDGPU/GlobalISel: Add IMMPopCount xformMatt Arsenault2020-01-093-0/+12
* AMDGPU/GlobalISel: Add selectVOP3Mods_nnanMatt Arsenault2020-01-093-0/+20
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