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| author | Lei Huang <lei@ca.ibm.com> | 2018-03-19 18:52:20 +0000 |
|---|---|---|
| committer | Lei Huang <lei@ca.ibm.com> | 2018-03-19 18:52:20 +0000 |
| commit | 6d1596a98c47d026d855fd882ea5708b232d9a66 (patch) | |
| tree | 575bef4deadea7358f495042adc1b5f7b623667f /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | d9d5bd3067a6cb8d036514d9f74079d1c8ad7ef9 (diff) | |
| download | bcm5719-llvm-6d1596a98c47d026d855fd882ea5708b232d9a66.tar.gz bcm5719-llvm-6d1596a98c47d026d855fd882ea5708b232d9a66.zip | |
[PowerPC][Power9]Legalize and emit code for quad-precision add/div/mul/sub
Legalize and emit code for quad-precision floating point operations:
* xsaddqp
* xssubqp
* xsdivqp
* xsmulqp
Differential Revision: https://reviews.llvm.org/D44506
llvm-svn: 327878
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 040a2cb0d18..82f0334daa1 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -785,6 +785,13 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, setOperationAction(ISD::SHL, MVT::v1i128, Legal); setOperationAction(ISD::SRL, MVT::v1i128, Legal); setOperationAction(ISD::SRA, MVT::v1i128, Expand); + + addRegisterClass(MVT::f128, &PPC::VRRCRegClass); + setOperationAction(ISD::FADD, MVT::f128, Legal); + setOperationAction(ISD::FSUB, MVT::f128, Legal); + setOperationAction(ISD::FDIV, MVT::f128, Legal); + setOperationAction(ISD::FMUL, MVT::f128, Legal); + } if (Subtarget.hasP9Altivec()) { |
