summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Commit message (Expand)AuthorAgeFilesLines
* [PowerPC] Use the two-constant NR algorithm for refining estimatesNemanja Ivanovic2019-05-071-1/+3
* [PowerPC] Fix erroneous condition for converting uint-to-fp vector conversionNemanja Ivanovic2019-05-061-3/+2
* Avoid cppcheck operator precedence warnings. NFCI.Simon Pilgrim2019-05-031-2/+2
* [NFC][PowerPC] Return early if the element type is not byte-sized in combineB...Kang Zhang2019-05-021-0/+5
* [TargetLowering] Change getOptimalMemOpType to take a function attribute listSjoerd Meijer2019-04-301-7/+5
* [PowerPC] Try harder to avoid load/move-to VSR for partial vector loadsRoland Froese2019-04-291-15/+36
* [PowerPC] Allow using initial-exec TLS with PICJoerg Sonnenberger2019-04-241-3/+10
* Add period at end of comment.Sean Fertile2019-04-241-1/+1
* [PowerPC] Fix wrong ElemSIze when calling isConsecutiveLS()Kang Zhang2019-04-181-1/+1
* [IR] Refactor attribute methods in Function class (NFC)Evandro Menezes2019-04-041-1/+1
* [PowerPC] Add the support for __builtin_setrnd()Kang Zhang2019-03-291-0/+131
* [PowerPC] Strength reduction of multiply by a constant by shift and add/sub i...Zi Xuan Wu2019-03-291-0/+86
* Fix for ABS legalization on PPC buildbot.Simon Pilgrim2019-03-191-2/+3
* [SelectionDAG] Handle unary SelectPatternFlavor for ABS case in SelectionDAGB...Simon Pilgrim2019-03-191-1/+2
* [TargetLowering] Add code size information on isFPImmLegal. NFCAdhemerval Zanella2019-03-181-1/+2
* [PowerPC] Avoid scalarization of vector truncateRoland Froese2019-02-111-0/+73
* [PPC] Include tablegenerated PPCGenCallingConv.inc onceReid Kleckner2019-01-291-95/+0
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [PowerPC] Fix machine verify pass error for PATCHPOINT pseudo instruction tha...Kang Zhang2018-12-301-3/+8
* [PowerPC] Complete the custom legalization of vector int to fp conversionNemanja Ivanovic2018-12-291-21/+38
* [NFC] clang-format functions related to r350113Zi Xuan Wu2018-12-281-87/+146
* [PowerPC] Fix assert from machine verify pass that atomic pseudo expanding ca...Zi Xuan Wu2018-12-281-35/+46
* [PowerPC] Fix the bug of ISD::ADDE to set its second return type to glueKang Zhang2018-12-251-1/+1
* [PPC] Always use the version of computeKnownBits that returns a value. NFCI.Simon Pilgrim2018-12-211-8/+5
* [PowerPC]Exploit P9 vabsdu for unsigned vselect patternsKewen Lin2018-12-191-0/+65
* [PowerPC] Improve vec_abs on P9Kewen Lin2018-12-181-35/+129
* [NFC] [PowerPC] add an routine in PPCTargetLowering to determine if a global ...QingShan Zhang2018-12-031-0/+29
* [PowerPC] Do not use vectors to codegen bswap with Altivec turned offNemanja Ivanovic2018-11-211-2/+4
* [PowerPC] Don't combine to bswap store on 1-byte truncating storeNemanja Ivanovic2018-11-201-2/+3
* [PowerPC] Enhance the selection(ISD::VSELECT) of vector typeZi Xuan Wu2018-11-141-7/+1
* Fix clang -Wimplicit-fallthrough warnings across llvm, NFCReid Kleckner2018-11-011-2/+2
* [PowerPC] Support constraint 'wi' in asmLi Jia He2018-11-011-2/+6
* [PowerPC] Fix some missed optimization opportunities in combineSetCCLi Jia He2018-10-261-0/+34
* [PowerPC] Keep vector int to fp conversions in vector domainNemanja Ivanovic2018-10-261-0/+68
* [Power9] Add __float128 support in the backend for bitcast to a i128Stefan Pintilie2018-10-231-0/+58
* [PowerPC] Fix the assert of ISD::SIGN_EXTEND_INREG when type is v2i16 and v2i8QingShan Zhang2018-10-101-32/+0
* [PowerPC] Implement hasBitPreservingFPLogic for types that can be supportedNemanja Ivanovic2018-10-091-0/+9
* [PowerPC] Fix the assert of combineBVOfConsecutiveLoads when element num is 1QingShan Zhang2018-09-201-1/+2
* [PowerPC] Fix label address calculation for ppc64Strahinja Petrovic2018-09-171-1/+2
* [PowerPC] Fix the calling convention for i1 arguments on PPC32Lion Yang2018-09-141-5/+15
* [PowerPC] Combine ADD to ADDZEQingShan Zhang2018-09-071-0/+97
* [PowerPC] Revert commit r339779Nemanja Ivanovic2018-08-271-3/+7
* [PowerPC] Recommit r340016 after fixing the reported issueNemanja Ivanovic2018-08-271-1/+25
* Temporarily Revert "[PowerPC] Generate Power9 extswsli extend sign and shift ...Eric Christopher2018-08-211-25/+1
* [PowerPC] Generate lxsd instead of the ld->mtvsrd sequence for vector loadsStefan Pintilie2018-08-171-0/+29
* [PowerPC] Generate Power9 extswsli extend sign and shift immediate instructionNemanja Ivanovic2018-08-171-1/+25
* [MI] Change the array of `MachineMemOperand` pointers to beChandler Carruth2018-08-161-24/+14
* [PowerPC] Enhance the selection(ISD::VSELECT) of vector typeNemanja Ivanovic2018-08-151-7/+3
* [PowerPC] Don't run BV DAG Combine before legalization if it assumes legal typesNemanja Ivanovic2018-08-151-3/+10
* [PowerPC] Improve codegen for vector loads using scalar_to_vectorZaara Syeda2018-08-081-11/+0
OpenPOWER on IntegriCloud