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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-03-19 18:55:46 +0000 |
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committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-03-19 18:55:46 +0000 |
commit | 77482120dae780444cff02fbe5ce4cdd8a71873a (patch) | |
tree | b23d46582e0657a20fee138b038461ea06cd302a /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
parent | ba47625ae51fddc321704dc0f35ebbc61966cc50 (diff) | |
download | bcm5719-llvm-77482120dae780444cff02fbe5ce4cdd8a71873a.tar.gz bcm5719-llvm-77482120dae780444cff02fbe5ce4cdd8a71873a.zip |
Fix for ABS legalization on PPC buildbot.
llvm-svn: 356498
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 2b1003663b6..aa3fc7c315b 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -551,8 +551,6 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, // add/sub are legal for all supported vector VT's. setOperationAction(ISD::ADD, VT, Legal); setOperationAction(ISD::SUB, VT, Legal); - if (VT.getSizeInBits() == 128) - setOperationAction(ISD::ABS, VT, Custom); // Vector instructions introduced in P8 if (Subtarget.hasP8Altivec() && (VT.SimpleTy != MVT::v1i128)) { @@ -638,6 +636,9 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, } } + for (auto VT : {MVT::v2i64, MVT::v4i32, MVT::v8i16, MVT::v16i8}) + setOperationAction(ISD::ABS, VT, Custom); + // We can custom expand all VECTOR_SHUFFLEs to VPERM, others we can handle // with merges, splats, etc. setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i8, Custom); |