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| author | Kang Zhang <shkzhang@cn.ibm.com> | 2019-05-02 08:15:13 +0000 |
|---|---|---|
| committer | Kang Zhang <shkzhang@cn.ibm.com> | 2019-05-02 08:15:13 +0000 |
| commit | 1a0d6d689923a5a3f890e4f2274da8217869e313 (patch) | |
| tree | 03c5c8e60c019d5c61aabea110f2ba223f5dc568 /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | c9f5220af903b3ca75ca08aec27a1481a4e7bcbd (diff) | |
| download | bcm5719-llvm-1a0d6d689923a5a3f890e4f2274da8217869e313.tar.gz bcm5719-llvm-1a0d6d689923a5a3f890e4f2274da8217869e313.zip | |
[NFC][PowerPC] Return early if the element type is not byte-sized in combineBVOfConsecutiveLoads
Summary:
Based on the Eli Friedman's comments in https://reviews.llvm.org/D60811 , we'd better return early if the element type is not byte-sized in `combineBVOfConsecutiveLoads`.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D61076
llvm-svn: 359764
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index f4524fa9846..52e9fc97b3c 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -12201,6 +12201,11 @@ static SDValue combineBVOfConsecutiveLoads(SDNode *N, SelectionDAG &DAG) { "Should be called with a BUILD_VECTOR node"); SDLoc dl(N); + + // Return early for non byte-sized type, as they can't be consecutive. + if (!N->getValueType(0).getVectorElementType().isByteSized()) + return SDValue(); + bool InputsAreConsecutiveLoads = true; bool InputsAreReverseConsecutive = true; unsigned ElemSize = N->getValueType(0).getScalarType().getStoreSize(); |
