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authorNemanja Ivanovic <nemanja.i.ibm@gmail.com>2019-05-06 13:35:49 +0000
committerNemanja Ivanovic <nemanja.i.ibm@gmail.com>2019-05-06 13:35:49 +0000
commit70afe4f7e1f72607881d8ff4719149a0dbc94120 (patch)
tree423815da17c0d2ec07b4fc9f87cfcf4e103df073 /llvm/lib/Target/PowerPC/PPCISelLowering.cpp
parent15a37ebb180a41432f05d201a2059470558b2cc5 (diff)
downloadbcm5719-llvm-70afe4f7e1f72607881d8ff4719149a0dbc94120.tar.gz
bcm5719-llvm-70afe4f7e1f72607881d8ff4719149a0dbc94120.zip
[PowerPC] Fix erroneous condition for converting uint-to-fp vector conversion
A condition for exiting the legalization of v4i32 conversion to v2f64 through extract/convert/build erroneously checks for the extract having type i32. This is not adequate as smaller extracts are actually legalized to i32 as well. Furthermore, an early exit is missing which means that we only check that both extracts are from the same vector if that check fails. As a result, both cases in the included test case fail - the first gets a select error and the second generates incorrect code. The culprit commit is r274535. llvm-svn: 360043
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.cpp5
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 92bf07af13c..3b61f4da351 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -12476,9 +12476,8 @@ SDValue PPCTargetLowering::DAGCombineBuildVector(SDNode *N,
ConstantSDNode *Ext2Op = dyn_cast<ConstantSDNode>(Ext2.getOperand(1));
if (!Ext1Op || !Ext2Op)
return SDValue();
- if (Ext1.getValueType() != MVT::i32 ||
- Ext2.getValueType() != MVT::i32)
- if (Ext1.getOperand(0) != Ext2.getOperand(0))
+ if (Ext1.getOperand(0).getValueType() != MVT::v4i32 ||
+ Ext1.getOperand(0) != Ext2.getOperand(0))
return SDValue();
int FirstElem = Ext1Op->getZExtValue();
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