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| author | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2016-05-24 18:37:18 +0000 |
|---|---|---|
| committer | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2016-05-24 18:37:18 +0000 |
| commit | 29ddd2b2f270babae0b46b923182f3df7de2aab8 (patch) | |
| tree | eca08360369d6c6fa0d8b7c7c7a8b31abb47336f /llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | |
| parent | 3cc425837d6a6cfe7efbaa53f493d8b20a9232da (diff) | |
| download | bcm5719-llvm-29ddd2b2f270babae0b46b923182f3df7de2aab8.tar.gz bcm5719-llvm-29ddd2b2f270babae0b46b923182f3df7de2aab8.zip | |
[AMDGPU][NFC] Rename ReserveTrapVGPRs -> ReserveRegs
Differential Revision: http://reviews.llvm.org/D20081
llvm-svn: 270594
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp index ee371177494..477792da7bf 100644 --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp @@ -193,12 +193,12 @@ BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const { assert(!isSubRegister(ScratchRSrcReg, ScratchWaveOffsetReg)); } - // Reserve VGPRs for trap handler usage if "amdgpu-debugger-reserve-trap-regs" + // Reserve registers for debugger usage if "amdgpu-debugger-reserve-trap-regs" // attribute was specified. const AMDGPUSubtarget &ST = MF.getSubtarget<AMDGPUSubtarget>(); - if (ST.debuggerReserveTrapVGPRs()) { + if (ST.debuggerReserveRegs()) { unsigned ReservedVGPRFirst = - MaxWorkGroupVGPRCount - MFI->getDebuggerReserveTrapVGPRCount(); + MaxWorkGroupVGPRCount - MFI->getDebuggerReservedVGPRCount(); for (unsigned i = ReservedVGPRFirst; i < MaxWorkGroupVGPRCount; ++i) { unsigned Reg = AMDGPU::VGPR_32RegClass.getRegister(i); reserveRegisterTuples(Reserved, Reg); |
