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| author | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2016-04-26 15:43:14 +0000 |
|---|---|---|
| committer | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2016-04-26 15:43:14 +0000 |
| commit | 1d99c4d03ce7d8d251f815e49caba968ea94b488 (patch) | |
| tree | d32c61adb8e5381f00e9ddb90443e20d550f2325 /llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | |
| parent | d285007720169bd1054cadfe65c3a5da84997d19 (diff) | |
| download | bcm5719-llvm-1d99c4d03ce7d8d251f815e49caba968ea94b488.tar.gz bcm5719-llvm-1d99c4d03ce7d8d251f815e49caba968ea94b488.zip | |
[AMDGPU] Reserve VGPRs for trap handler usage if instructed
Differential Revision: http://reviews.llvm.org/D19235
llvm-svn: 267563
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp index 8f562b66cfb..1f09500ebf1 100644 --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp @@ -193,6 +193,17 @@ BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const { assert(!isSubRegister(ScratchRSrcReg, ScratchWaveOffsetReg)); } + // Reserve VGPRs for trap handler usage if "amdgpu-debugger-reserve-trap-regs" + // attribute was specified. + const AMDGPUSubtarget &ST = MF.getSubtarget<AMDGPUSubtarget>(); + if (ST.debuggerReserveTrapVGPRs()) { + for (unsigned i = MaxWorkGroupVGPRCount - ST.debuggerReserveTrapVGPRCount(); + i < MaxWorkGroupVGPRCount; ++i) { + unsigned Reg = AMDGPU::VGPR_32RegClass.getRegister(i); + reserveRegisterTuples(Reserved, Reg); + } + } + return Reserved; } |
