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* STOP: writing all 1s to lpid of each thread regardless fuse or notYue Du2017-10-232-4/+44
| | | | | | | | | | | Change-Id: I9b38af86e1d11167137d4c6a64a1229eb9ab4f59 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38423 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP: Conditional compile current error check to save cme sizeYue Du2017-10-235-0/+69
| | | | | | | | | Change-Id: I46f19d388c6fdf16ae6865864cd648ecc707ba20 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38366 Dev-Ready: YUE DU <daviddu@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* p9_sbe_chiplet_reset,p9_sbe_arrayinitAnusha Reddy Rangareddygari2017-10-231-1/+14
| | | | | | | | | | | | | | | | | * assert SCAN_CLK_USE_EVEN=1 in OPCG_REG1 in cumulus chip MC chiplet * Cumulus only dropping MC chiplet fence during arrayinit Change-Id: Id339b8707cb2caac62068bdea1c93465b43721e2 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38028 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
* STOP: Acquire pcbmux after assert glsmux in cme exitYue Du2017-10-232-87/+37
| | | | | | | | | Change-Id: Ic5e3df2eb9508131f334686084ba65c5bde31618 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38361 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Enablement of additional eq_ana_bndy rings for Nimbus DD2Sumit Kumar2017-10-237-45/+182
| | | | | | | | | | | | | | - ex_l2_fure_1 and ex_l3_fure_1 rings have been removed Change-Id: Ia9fd9bce71b24a8512338c26020d60ef38bbf96c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37720 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com>
* Increased the size of buildTag in xip header by another 4BytesRaja Das2017-10-235-16/+5
| | | | | | | | | | | | RTC:170829 Change-Id: I82b6a6fbe0816ab3cf205aa4e7b5dfe1fda2c8bb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38195 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com>
* PM: Updated QPMR and SGPE Header with 24x7 offset and length.Prem Shanker Jha2017-10-234-13/+19
| | | | | | | | | | | | Change-Id: Idfcca3888ad1446a9e5130538e8270adc44e2631 RTC:164313 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34192 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* STOP: FIX phantom wakeup vs. wakeup_notify_selectYue Du2017-10-235-50/+190
| | | | | | | | | | | | | | | | | | 1) sgpe check type2 and 3 on the same core 2) cme check if notify is truely set 3) sgpe check if notify is truely set during stop8 entry 4) FIX phantom wakeup vs. wakeup_notify_select 5) so 4) isnt good enough as phantom can be noticed when notify = 1 or 0 (good type checker caught this) instead of using truth table to completely handle/detect unwanted cases. Change-Id: I3df8326260ba505db7efb3bdee17cc8908bd13fc Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37975 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* STOP: Atomic lock of cache clock controller and PCB slaveYue Du2017-10-233-0/+50
| | | | | | | | | | | | | Atomic lock the Cache clock controller before stopping L2 clocks. Do not release it until both EXs exit Stop8. Atomic lock the entire cache chiplet only for Stop11 entry, exit. Change-Id: I63691b707c17026ac744b461d40b438666c40d01 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37881 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* CME Pstate Updates(Platform Interdependence)Rahul Batra2017-10-239-29/+32
| | | | | | | | | | | | | | - Added dpll_pstate0 calculation in pstate parameter block code Change-Id: I0e8530ab510678e839421d88930e2156ba337f74 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37982 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* Core Init additions to put ABIST engines in parallel mode for Nimbus DD1.0Thi Tran2017-10-235-3/+18
| | | | | | | | | | | | | | | | CMVC-Prereq:1019352 RTC:167284 Change-Id: I167c63950f72eb0446e3dd746ebd1e12adfb9f69 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36962 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* TOR API cleanup: Removing support for GET_CPLT_LEVEL_RINGSClaus Michael Olsen2017-10-233-538/+14
| | | | | | | | | | | and related structures SbeTorId and CmeTorId. Change-Id: I4bde34a633a8db2468b32fde8ea7432086b27b0c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36781 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com>
* STOP: Fix DSL and enable the solutionYue Du2017-10-232-9/+25
| | | | | | | | | | Change-Id: Ib310964626dd7805b02a34a42d9c866e8c8f2484 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35134 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: JAMES DEZELLE <jdezelle@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Dev-Ready: Gregory S. Still <stillgs@us.ibm.com>
* p9_pstate_parameter_block: access #W and populate parameter block stucturePrasad Bg Ranganath2017-10-231-0/+30
| | | | | | | | | | | Change-Id: I2d996c848d893074cec0eb74408b3300b60ff1d9 RTC:167146 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35721 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* WOF/PGPE Bug Fixes(Set 2)Rahul Batra2017-10-2316-343/+437
| | | | | | | | | | | | | | | | | | -Fixes Inter-CME interrupt issue -Fixed back to back CLIP Updt issue -reverses CLIP_UPDT clip_min and clip_max(as per OCC) -Fixes AVS_Driver issues -Moved VPD points from GeneratedPstateInfo to Global Parm -Added nest frequency field to OCCParmBlock -Picking up slopes from Global Parm Change-Id: I7578a8a51efde59f0678b9c3f44be77bf7a15603 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36741 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* PM: Incorporated support for enabling/disabling queued scan mode.Prem Shanker Jha2017-10-231-0/+1
| | | | | | | | | | | | | | | | | | Populates a bit in CME flag field of CME's image header. Given CME flag is expected to be read by CME Hcode to decide if queued scanning is to be supported. - Rebased Change-Id: Ie2a5291c393b140266a5d2ed204f54d83f390199 RTC:160171 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30520 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* Add ec_abst ring to p9n.hw_imageThi Tran2017-10-233-2/+12
| | | | | | | | | | | Change-Id: Ic6fc899956e0690f75224471917ff904aa03713e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37768 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
* Meshctrl setup updateAnusha Reddy Rangareddygari2017-10-231-0/+4
| | | | | | | | | | | | | | syncclk_muxsel dropping relatively to dropping the tholds Change-Id: Iae6e7b38a2a4d2b3cac3f8e82900056b0d2091d7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36544 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
* PM: Add CME_INSTRUCTION_TRACE_ENABLE attribute support for debug controlGreg Still2017-10-231-0/+1
| | | | | | | | | | | Change-Id: Id93fb6773616ccce77408f72a9ad1245e7a555d8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37521 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* STOP: Change ring_save structure to 0xfff3fc00 PDA locationYue Du2017-10-233-33/+20
| | | | | | | | | | | | | | | | | | | | | | | z .pda_ptrs 0x00000000fff3fc00 0x180 z 0x00000000fff3fc00 G_ring_save z z uint64_t G_ring_save[MAX_QUADS][8] z __attribute__((section(".pda_ptrs"))) = z { z {0, 0, 0, 0, 0, 0, 0, 0}, z {0, 0, 0, 0, 0, 0, 0, 0}, z {0, 0, 0, 0, 0, 0, 0, 0}, z {0, 0, 0, 0, 0, 0, 0, 0}, z {0, 0, 0, 0, 0, 0, 0, 0}, z {0, 0, 0, 0, 0, 0, 0, 0} z }; Change-Id: Ie48971ffaaa0d342d4091e0884cf1ae27a0265d6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36837 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* PM: Fix PGPE GPPB downloadGreg Still2017-10-232-1/+3
| | | | | | | | | | | | | - Introduced by 36253. - PGPE booting ok; only effects PGPE Pstate operation Change-Id: I573ae3dc843e42ab92bbb6cf273e81c88bad4e66 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37647 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* p9_tor: cleanup - use p9_ringid_get_chiplet_properties()Martin Peschke2017-10-231-141/+16
| | | | | | | | | | | | | Replace some redundant code by calling a common helper function. Change-Id: I702cc67e06f71162c164fb82ab3335c6cb23fd7f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32650 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com>
* p9_ringId: reorder CHIPLET_TYPE enum entriesMartin Peschke2017-10-231-4/+5
| | | | | | | | | | | | | | | | Now CHIPLET_TYPE reflects the index of chiplet slots in TOR. This changes allows to stream-line some code, mostly TOR related. This change is transparent for users of CHIPLET_TYPE, since its only intended use is to distingiush chiplet types. Change-Id: I599945741fe3ee63c8a9d2e7ea611438f01f1675 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36556 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com>
* STOP: PCBMux Savior version 2 + TLBIE workaroundBrian Vanderpool2017-10-238-28/+417
| | | | | | | | | | | | | | | 1. When the SGPE is scanning the cache, set the PM_DISBLE bits in SLAVE_CONFIG 2. Before the CME request the PCBMUX, mask return codes, do a dummy read to the PPM, unmask return codes, request the mux, poll for completion and then do a read to CPLT_STAT afterwards 3. TLBIE fix - save LPIDs, ram with dummy value, do TLBIE quiesce, restore LPIDS Change-Id: I058c745aa442107d4af6e4331659d796399b11ed Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37509 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* STOP: SGPE(image/bootloader) and OCC Start Addr CHANGE in SRAMYue Du2017-10-232-6/+12
| | | | | | | | | | Change-Id: Idd370310e23e795ea26750f9d4f1d6bb59512dee Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36703 Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* Enable CME IAR trace and remove stall events from traceBrian Vanderpool2017-10-232-3/+8
| | | | | | | | | Change-Id: I1557b7e1eded7df56fec20d862421d0d881d79aa Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37481 Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* Use compile directive USE_PPE_IMPRECISE_MODE to block queued scanBrian Vanderpool2017-10-231-0/+4
| | | | | | | | | Change-Id: If8939935fc1fbf465d1612a4ebd5020d4e994179 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37494 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* p9_tor: fix some random bytes in TOR imageMartin Peschke2017-10-231-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There are 4 padding bytes needed for an 8 byte alignment at the end of the TOR slot array for PERV common rings, which sometimes exhibited non-zero content. These could have been mistaken as valid offsets pointing to rings that didn't exist in the image, if a users assumed a 16th PERV common ring, which might be added in the future. The original code used an array and a loop - which didn't account for padding bytes - to zero all slots. A following memcpy() - which accounted for padding bytes - copied bytes beyound the array boundary. This code was a total mess anyway, and hence it is replaced by single memset(), which uses a corrected size value. This problem was only found in the function used for ring slots. Nevertheless, similar code has been cleaned up for two other use cases. Change-Id: I1c81518ff81a6af735240090cdbc7735f60f3edb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37287 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com>
* PM: VPD in #V order and Natural OrderGreg Still2017-10-231-4/+12
| | | | | | | | | | Change-Id: Iaa2a24d872b56b337cc34c286411329499e9816b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37071 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* Hcode: Create centralized memory map headersYue Du2017-10-2347-724/+1051
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | findings and todos: zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz redundant cpmr linker not sure which one is in use cme/link.cmd cme/linkcpmr.cmd cme/stop_cme/link_cpmr.cmd sgpe/stop_gpe/link.cmd sgpe/stop_gpe/linkqpmr.cmd zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz redundant asm of cpmr and qpmr headers: not sure which one is in use file names are inconsistant and confusing cme/p9_cpmr_header.S cme/stop_cme/p9_cme_cpmr.S cme/stop_cme/p9_cme_header.S sgpe/p9_sgpe_qpmr.S sgpe/stop_gpe/p9_sgpe_qpmr.S sgpe/stop_gpe/p9_sgpe_image_header.S zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz redundant edit programs not sure which ones are still useful contents are overlapping and out updated (i.e. cme one still try to edit build date/ver) cme/p9_cpmr_img_edit.C cme/stop_cme/p9_cme_img_edit.c cme/stop_cme/p9_cme_edit.mk sgpe/p9_sgpe_img_edit.c sgpe/stop_gpe/p9_sgpe_img_edit.c sgpe/stop_gpe/p9_sgpe_edit.mk zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz previous local makefiles not sure if still useful optional to keep or delete cme/Makefile cme/img_defs.mk sgpe/Makefile sgpe/img_defs.mk sgpe/stop_gpe/Makefile sgpe/stop_gpe/img_defs.mk sgpe/boot/Makefile sgpe/boot/img_defs.mk zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz Change-Id: I94fbd28fc3e3c125e43232ea556a4e70b293db6d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36253 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* STOP: Fix optimize size and quad spwu issue of EIMR bookkeepYue Du2017-10-231-2/+2
| | | | | | | | | | Change-Id: Ia0795467fc58076360cba2b48f1226b1c2a13079 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37234 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* xip_tool: Combining two EKB vs PPE repo directives.Claus Michael Olsen2017-10-232-8/+8
| | | | | | | | | | | - Changed XIP_TOOL_ENABLE_DISSECT to __PPE__ Change-Id: Ia04f3f77eb44a3dc24c8d248a6c1184cb9e2f2f4 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37258 Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com>
* SGPE:putring: scan bit wise for eq_ana_bndy ringsPrasad Bg Ranganath2017-10-232-4/+9
| | | | | | | | | Change-Id: I4f3c25ef4dcdcd40ac4b68217aa76cca28fafcad Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37249 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP: Enable CME SRAM Scrub EngineYue Du2017-10-231-0/+4
| | | | | | | | | | Change-Id: I60c1e5bd03a4cf74da7dc86acbce88d04eb4c8cf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34457 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP: add sync before change pcbmux statusYue Du2017-10-231-1/+8
| | | | | | | | | Change-Id: I329aefa533ca67ac416888f18dcbf0142679e50e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37204 Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP: Fix SPWUYue Du2017-10-232-93/+53
| | | | | | | | | Change-Id: I58715f9dccf05782cdd476e74818cdf0865eec36 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37052 Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* ana_bndy RS4v2 algorithm support in ring_apply to accommodate properClaus Michael Olsen2017-10-233-218/+223
| | | | | | | | | | | | FSM control (i.e., set and reset latches) during scanning. Change-Id: Ic0f323ae08d0d9c31d5cee37a61fb476eaf3f2d9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35178 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com>
* p9_xip_tool: fix ring dissect warningsMartin Peschke2017-10-231-0/+7
| | | | | | | | | | | | | | | Fixes "Ambiguity on input PARMS for calling SEEPROM Ring copy API." for p9_xip_tool <SEEPROM image> dissect .ring Change-Id: If82dddc3a6eba516b0a5ba9bc213074095daee41 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37201 Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com>
* Add initial p9c ddr_phy_reset, dimmBadDqBitmapAccessHwp, slew, & unmask_errorsAndre Marin2017-10-231-0/+73
| | | | | | | | | | | Change-Id: I1cbe3225208e6ee6c107ff84a9ebbb6248f0c7b8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35429 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP: Fix SKIP_INITF flag in SGPE for EPMYue Du2017-10-231-5/+5
| | | | | | | | | Change-Id: Idab5aee2c9b0f1a84a0c99058a231e511d241310 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36044 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* IPL/Stop: Assert ABIST_SRAM_MODE_DC to support ABIST RecoveryYue Du2017-10-232-0/+10
| | | | | | | | | | | Change-Id: I4465535c32e3cde8e8e2f0f3a13bb1d66d1f7614 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36728 Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP: move drop few quiesces from l2/cache startclocks to scomcustYue Du2017-10-237-63/+59
| | | | | | | | | | | tlbie quiesce/l2 snoop disable for L2 refresh quiesce/lco disable for quad Change-Id: I221efae4d2d724c92334e5bc79f719307426583c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36614 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* STOP: Fix L2 purge abort by pc interrupt on core handoff to sgpeYue Du2017-10-231-9/+19
| | | | | | | | | Change-Id: I81973d4de46f134f72dc9582aae7e6b6ea749e42 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36602 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: JAMES DEZELLE <jdezelle@us.ibm.com> Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* Fapi2/PPE plat: fix timebase incrementer in delay implementationYue Du2017-10-231-10/+21
| | | | | | | | | Change-Id: I8c813b317a6015e504abf3dbc936d3eae1d96930 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36723 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com> Reviewed-by: JAMES DEZELLE <jdezelle@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* centaur_misc_constants.H -- adjust polling costants for simJoe McGill2017-10-231-2/+2
| | | | | | | | | | | | initial port in values for MAX_FLUSH_LOOPS / SIM_FLUSH_DELAY don't cover delay values used in p8 sim for 72u 72d refclock Change-Id: Ib4ed195a93c70142e646dfb53328b4a0d2614ae8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36876 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Victor F. Fernandes <vf@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PM: Added support for PGPE Boot/PGPE integrationPrem Shanker Jha2017-10-2328-286/+1058
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - support for P-State parameter block - implements a compact image layout of PGPE similar to CME/SGPE. - adds PGPE boot progress code as a field in PPMR header. - implements PGPE boot loader and PGPE boot copier. - incorporates ability to generate PPMR header in the build flow. - change logic for calculating CME's first block copy length. - Turned on generated tables in PGPE Hcode - Fixed up pointers to generated tables - add ATTR_PGPE_HCODE_FUNCTION_ENABLE attribute to control PGPE ops - fix p9_pstate_parameter_build bug with AVS timing attributes - Make OCC Pstate Parameter block a fixed offset (128KB) in PPMR - Make Pstate Table from PGPE a fixed offset (144KB) in PPMR to ease debug - Fix Endianes issues in OCC PPB and input slope calcs - Added PGPE Hcode Length to PGPE header so that GPPB SRAM location is known. - Build flag for OCc Immediate IPC response - Build flag to no use temp boot settings - Expanding tracing for debug - Added default values for PBAX attributes as placeholders for MRW in firmware - Added WOF VFRT structure definions to headers; movement into HOMER NOT yet supported - Addressed review comments and rebased - Rebased with ATTR_PGPE_HCODE_FUNCTION_ENABLE in separate commit for Cronus Change-Id: I4752debbc7fb3275d4e79804333654511de427ff Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26115 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* SGPE:putring NSL ring mode supportPrasad Bg Ranganath2017-10-235-14/+417
| | | | | | | | | Change-Id: Idcfb57b5f74f42affc1b1d08890db8f5bc8b1129 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36550 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP: Fix L3 LCO EX IDYue Du2017-10-231-1/+1
| | | | | | | | | | Change-Id: Ibcb839dc0df5ae8df767985d219071d0d280a578 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37005 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP: optimize size of stop imagesYue Du2017-10-2331-1364/+910
| | | | | | | | | | | | | | | | | | | | | | | | | | 1) optimize scom with no rc and directly inline asm(saved for 2K :D) 2) initialize all variables(doesnt really save size, just good guideline) 3) loop both cores when block is big and redundant(saved only 50B -_-) (50b for 3 blocks, each block saves 17b, or 4 instructions) 4) improvement on history update(saved 500B more :)) 5) functionalize the exit catchup routine which is identical twice (this back fired and cost us 100B :() 6) functionalize the eval eimr override macro which is identical twice (saved 130B :|) 7) finally the saving is about 2728B on CME 8) apply history update tech to sgpe, found bug in the tech, fixed (but our saving is back to ~2500B) 9) clean up sgpe redundent ex branching code (same as cme saved only about ~60B) 10) rebase Change-Id: I3664d6a2dcab85f896a583852afde948e635bd02 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34777 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* HW399609: DD1 changing core/nest hang limit or hang pulse dividerYue Du2017-10-231-5/+23
| | | | | | | | | | Change-Id: I580cd70ce3315ea3f2aeb274279a89375f02b05d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36375 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com>
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