CME Pstate Updates(Platform Interdependence)

       - Added dpll_pstate0 calculation in pstate
         parameter block code

Change-Id: I0e8530ab510678e839421d88930e2156ba337f74
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37982
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>

9 files changed, 32 insertions, 29 deletions

diff --git a/import/chips/p9/procedures/hwp/lib/p9_pstates_cmeqm.h b/import/chips/p9/procedures/hwp/lib/p9_pstates_cmeqm.h
index 74ca11a2..80001f4f 100644
--- a/import/chips/p9/procedures/hwp/lib/p9_pstates_cmeqm.h
+++ b/import/chips/p9/procedures/hwp/lib/p9_pstates_cmeqm.h
@@ -209,16 +209,16 @@ typedef struct
     uint8_t  droop_large_override_enable;
     uint8_t  droop_extreme_override_enable;
     uint8_t  overvolt_override_enable;
-    uint16_t fmin_override_khz_enable;
-    uint16_t fmax_override_khz_enable;
+    uint8_t fmin_override_khz_enable;
+    uint8_t fmax_override_khz_enable;
 
     // The respecitve *_enable above indicate which index values are valid
     uint8_t  droop_small_override[VPD_PV_POINTS];
     uint8_t  droop_large_override[VPD_PV_POINTS];
     uint8_t  droop_extreme_override[VPD_PV_POINTS];
     uint8_t  overvolt_override[VPD_PV_POINTS];
-    uint16_t fmin_override_khz[VPD_PV_POINTS];
-    uint16_t fmax_override_khz[VPD_PV_POINTS];
+    uint8_t fmin_override_khz[VPD_PV_POINTS];
+    uint8_t fmax_override_khz[VPD_PV_POINTS];
 
     /// Pad structure to 8-byte alignment
     /// @todo pad once fully structure is complete.
@@ -327,6 +327,9 @@ typedef struct
     /// VDM Data
     VDMParmBlock vdm;
 
+    /// DPLL pstate 0 value
+    uint32_t dpll_pstate0_value;
+
 } LocalPstateParmBlock;
 
 #ifdef __cplusplus
diff --git a/import/chips/p9/procedures/ppe_closed/cme/p9_cme_main.c b/import/chips/p9/procedures/ppe_closed/cme/p9_cme_main.c
index bb978c3b..7317a51d 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/p9_cme_main.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/p9_cme_main.c
@@ -126,7 +126,7 @@ EXTERNAL_IRQ_TABLE_END
 
 #define  CME_THREAD_STACK_SIZE_STOP_EXIT   512
 #define  CME_THREAD_STACK_SIZE_STOP_ENTRY  512
-#define  CME_THREAD_STACK_SIZE_PSTATE_DB   256
+#define  CME_THREAD_STACK_SIZE_PSTATE_DB   384
 #define  CME_THREAD_STACK_SIZE_PSTATE_PMCR 256
 #if TEST_ONLY_BCE_IRR
     #define  CME_THREAD_STACK_SIZE_BCE_IRR     256
diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_intercme.c b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_intercme.c
index 4e3ac93d..a3ede88b 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_intercme.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_intercme.c
@@ -34,7 +34,7 @@
 #include "p9_cme_flags.h"
 #include "p9_cme_pstate.h"
 #include "pstate_pgpe_cme_api.h"
-#include "p9_pstate_vpd.h"
+//#include "p9_pstate_vpd.h"
 #include "ppe42_cache.h"
 
 //
diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.c b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.c
index e96fcb89..f0cc54cb 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.c
@@ -50,11 +50,14 @@
 #include "cmehw_common.h"
 #include "cmehw_interrupts.h"
 #include "p9_cme_pstate.h"
-
+#include "p9_hcode_image_defines.H"
 
 //
 //Globals
 //
+cmeHeader_t* G_cmeHeader;
+LocalPstateParmBlock* G_lppb;
+
 
 //
 //send_pig_packet
diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.h b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.h
index 5ed3c178..ec37e922 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.h
+++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.h
@@ -38,6 +38,8 @@
 #include "pk.h"
 #include "pstate_pgpe_cme_api.h"
 #include "gpehw_common.h"
+#include "p9_hcode_image_defines.H"
+#include "p9_pstates_cmeqm.h"
 
 enum  PMCR_CONTROL
 {
diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
index e553dfba..0ed7f425 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
@@ -41,25 +41,21 @@
 #include "p9_cme_irq.h"
 #include "p9_cme_flags.h"
 #include "p9_cme_pstate.h"
-#include "p9_cme_header.h"
+//#include "p9_cme_header.h"
 #include "pstate_pgpe_cme_api.h"
-#include "p9_pstate_vpd.h"
+//#include "p9_pstate_vpd.h"
 #include "ppe42_cache.h"
+#include "p9_hcode_image_defines.H"
 
 
 //
-//Globals
+//External Globals and globals
 //
 extern CmePstateRecord G_cme_pstate_record;
+extern cmeHeader_t* G_cmeHeader;
+extern LocalPstateParmBlock* G_lppb;
 cme_pstate_db_data_t G_db_thread_data;
 
-//\todo Use PState Parameter Block structures. RTC
-extern global_pstate_table_t G_gpst;
-//extern freq_2_idx_entry_t G_freq2idx[NUM_FREQ_REGIONS];
-//extern uint16_t G_cgm_table[CGM_TRANSITIONS];
-extern uint8_t G_resclkEnabled;
-extern cme_header_t* G_cme_header;
-
 //
 //Function Prototypes
 //
@@ -88,13 +84,14 @@ void p9_cme_pstate_db_handler(void* arg, PkIrqId irq)
 //
 void p9_cme_pstate_db_thread(void* arg)
 {
-    PK_TRACE("DB_TH: Started\n");
+    PK_TRACE_INF("DB_TH: Started\n");
     uint32_t cme_flags;
     PkMachineContext  ctx;
     uint32_t pir;
 
-    //\todo Read the data from HOMER code. RTC
-    p9_pstate_vpd_init();
+    G_cmeHeader = (cmeHeader_t*)(CME_SRAM_HEADER_ADDR);
+    G_lppb = (LocalPstateParmBlock*)(G_cmeHeader->g_cme_pstate_region_offset + CME_SRAM_BASE_ADDR);
+    PK_TRACE_INF("DB_TH: Hdr=0x%x, LPPB=0x%x\n", (uint32_t)G_cmeHeader, (uint32_t)G_lppb);
 
     //Read CME_LCL_FLAGS
     cme_flags = in32(CME_LCL_FLAGS);
@@ -168,8 +165,7 @@ void p9_cme_pstate_db_thread(void* arg)
 
         out64(CME_LCL_EIMR_OR, BIT64(7));//Disable  InterCME_IN0
         g_eimr_override |= BIT64(7);
-
-        G_db_thread_data.dpll_pstate0_value = G_gpst.pstate0_frequency_khz / G_gpst.frequency_step_khz;
+        G_db_thread_data.dpll_pstate0_value   = G_lppb->dpll_pstate0_value;
     }
     else
     {
@@ -476,6 +472,7 @@ inline void p9_cme_pstate_freq_update(uint64_t dbData)
 
     PK_TRACE_INF("DB_TH: DBData=0x%08x%08x\n", dbData >> 32, dbData);
     PK_TRACE_INF("DB_TH: Dpll0=0x%x\n", G_db_thread_data.dpll_pstate0_value);
+    PK_TRACE_INF("DB_TH: Hdr=0x%x, LPPB=0x%x\n", (uint32_t)G_cmeHeader, (uint32_t)G_lppb);
     //Adjust DPLL
 
     cppm_ippmcmd_t  cppm_ippmcmd;
diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_pmcr.c b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_pmcr.c
index 2f2a73b3..373bc80d 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_pmcr.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_pmcr.c
@@ -41,9 +41,9 @@
 #include "p9_cme_irq.h"
 #include "p9_cme_flags.h"
 #include "p9_cme_pstate.h"
-#include "p9_cme_header.h"
+//#include "p9_cme_header.h"
 #include "pstate_pgpe_cme_api.h"
-#include "p9_pstate_vpd.h"
+//#include "p9_pstate_vpd.h"
 #include "ppe42_cache.h"
 
 //
diff --git a/import/chips/p9/procedures/ppe_closed/cme/topfiles.mk b/import/chips/p9/procedures/ppe_closed/cme/topfiles.mk
index 7bfb7e3d..54d8ec69 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/topfiles.mk
+++ b/import/chips/p9/procedures/ppe_closed/cme/topfiles.mk
@@ -34,9 +34,7 @@ UTILS-C-SOURCES  = utils/p9_putringutils.c \
 PSTATE-C-SOURCES = 	pstate_cme/p9_cme_pstate.c \
 					pstate_cme/p9_cme_thread_db.c \
 					pstate_cme/p9_cme_thread_pmcr.c \
-					pstate_cme/p9_cme_header.c \
-					pstate_cme/p9_cme_intercme.c \
-		   			pstate_cme/p9_pstate_vpd.c
+					pstate_cme/p9_cme_intercme.c 
 
 STOP-C-SOURCES   = stop_cme/p9_cme_stop_irq_handlers.c \
                    stop_cme/p9_cme_stop_enter_thread.c \
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c
index c533a3b8..2e40242d 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c
@@ -65,13 +65,13 @@ void p9_pgpe_irq_handler_sgpe_halt(void* arg, PkIrqId irq)
 //
 //Checkstop GPE2 Interrupt Handler
 //
-//\TODO
-//Implement this handler. Should call code same as "Pstart STOP" IPC from OCC
 void p9_pgpe_irq_handler_xstop_gpe2(void* arg, PkIrqId irq)
 {
     PK_TRACE_DBG("XSTOP GPE2: Enter\n");
     PkMachineContext  ctx;
 
+    pk_halt();
+
     pk_irq_vec_restore(&ctx);//Restore interrupts
     PK_TRACE_DBG("XSTOP GPE2: Exit\n");
 }