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* [RISCV] Fix incorrect FP base CFI offset for variable argument functionsShiva Chen2020-06-251-4/+4
* [RISCV64] Emit correct lib call for fp(float/double) to ui/siKamlesh Kumar2020-06-251-2/+122
* [LegalizeTypes][RISCV] Correctly sign-extend comparison for ATOMIC_CMP_XCHGAlex Bradbury2020-06-251-0/+10
* [RISCV] Correct the CallPreservedMask for the function call in an interrupt h...Shiva Chen2020-02-201-0/+70
* [RISCV] Support ABI checking with per function target-featuresZakk Chen2020-01-271-3/+8
* Revert "[RISCV] Support ABI checking with per function target-features"Zakk Chen2020-01-271-8/+3
* [RISCV] Check the target-abi module flag matches the optionZakk Chen2020-01-272-0/+51
* [RISCV] Support ABI checking with per function target-featuresZakk Chen2020-01-151-3/+8
* Revert "[RISCV] Support ABI checking with per function target-features"Zakk Chen2020-01-151-8/+3
* [RISCV] Support ABI checking with per function target-featuresZakk Chen2020-01-151-3/+8
* [RISCV] Allow shrink wrapping for RISC-Vlewis-revill2020-01-141-0/+97
* [RISCV] Handle globals and block addresses in asm operandsLuís Marques2020-01-131-2/+44
* Move tail call disabling code to target independent codeReid Kleckner2020-01-031-0/+10
* Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" a...Fangrui Song2019-12-242-2/+2
* [RISCV][NFC] Fix use of missing attribute groups in testsLuís Marques2019-12-233-6/+6
* [RISCV] Enable the machine outliner for RISC-Vlewis-revill2019-12-191-0/+132
* [RISCV] Add subtargets initialized with target featureZakk Chen2019-12-171-0/+15
* [PGO][PGSO] Enable size optimizations in code gen / target passes for cold code.Hiroshi Yamauchi2019-12-131-0/+28
* [RISCV] Fix mir-target-flags.llSam Elliott2019-12-091-10/+7
* [RISCV] Machine Operand Flag SerializationSam Elliott2019-12-091-0/+77
* [MBP] Avoid tail duplication if it can't bring benefitGuozhi Wei2019-12-062-413/+572
* Reland [MachineCopyPropagation] Extend MCP to do trivial copy backward propag...Kai Luo2019-12-052-12/+6
* Revert "[MachineCopyPropagation] Extend MCP to do trivial copy backward propa...Kai Luo2019-12-052-6/+12
* [MachineCopyPropagation] Extend MCP to do trivial copy backward propagationKai Luo2019-12-052-12/+6
* [RISCV] Don't force Local Exec TLS for non-PICJames Clarke2019-12-031-31/+72
* [LegalizeTypes][RISCV] Soften FCOPYSIGN operandLuís Marques2019-11-261-0/+18
* [RISCV] Handle fcopysign(f32, f64) and fcopysign(f64, f32)Luís Marques2019-11-261-0/+92
* [RISCV] Handle variable sized objects with the stack need to be realignedShiva Chen2019-11-162-13/+72
* [RISCV] Use addi rather than add x0Sam Elliott2019-11-141-20/+20
* [RISCV] Fix wrong CFI directivesLuís Marques2019-11-145-103/+0
* Revert "[RISCV] Fix wrong CFI directives"Luís Marques2019-11-135-0/+103
* [RISCV] Fix wrong CFI directivesLuís Marques2019-11-135-103/+0
* [RISCV][NFC] Add nounwind to LKK test functionsLuís Marques2019-11-114-653/+30
* [RISCV] Fix CFA when doing split sp adjustment with fpLuís Marques2019-11-102-12/+4
* [RISCV][NFC] Add CFI-related testsLuís Marques2019-11-102-8/+501
* [RISCV] Add InstrInfo areMemAccessesTriviallyDisjoint hookLuís Marques2019-11-051-0/+26
* [RISCV] Implement the TargetLowering::getRegisterByName hookLuís Marques2019-11-043-0/+84
* [RISCV] Remove RA from reserved register to use as callee saved registerShiva Chen2019-10-291-26/+28
* [RISCV] Lower llvm.trap and llvm.debugtrapSam Elliott2019-10-281-0/+38
* [RISCV] Add support for half-precision floatsLuís Marques2019-10-251-0/+142
* [RISCV] Add support for -ffixed-xX flagsSimon Cook2019-10-222-0/+166
* [RISCV] Add MachineInstr immediate verificationLuis Marques2019-10-161-0/+11
* [RISCV] Support fast calling conventionShiva Chen2019-10-152-0/+156
* [SelectionDAG] Add tests for LKK algorithmDavid Bolvansky2019-10-054-0/+4045
* [RISCV] Split SP adjustment to reduce the offset of callee saved register spi...Shiva Chen2019-10-044-222/+177
* [TargetLowering] Simplify expansion of S{ADD,SUB}ORoger Ferrer Ibanez2019-09-301-20/+8
* [RISCV] Switch to the Machine SchedulerLuis Marques2019-09-1772-7481/+7662
* Revert Patch from PhabricatorLuis Marques2019-09-1772-7662/+7481
* Patch from PhabricatorLuis Marques2019-09-1772-7481/+7662
* [RISCV] Support stack offset exceed 32-bit for RV64Shiva Chen2019-09-132-33/+59
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