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path: root/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
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* Make TargetInstrInfo::isPredicable take a const reference, NFCKrzysztof Parzyszek2017-03-031-1/+1
* [XRay] Implement powerpc64le xray.Tim Shen2017-02-101-1/+3
* [PowerPC] Expand ISEL instruction into if-then-else sequence.Tony Jiang2017-01-161-6/+0
* Revert "[PowerPC] Expand ISEL instruction into if-then-else sequence."Tony Jiang2017-01-161-0/+6
* [PowerPC] Expand ISEL instruction into if-then-else sequence.Tony Jiang2017-01-161-6/+0
* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-6/+10
* [Power9] Exploit D-Form VSX Scalar memory ops that target full VSX register setNemanja Ivanovic2016-10-041-6/+45
* [Power9] Part-word VSX integer scalar loads/stores and sign extend instructionsNemanja Ivanovic2016-10-041-18/+26
* [Power9] Add exploitation of non-permuting memory opsNemanja Ivanovic2016-09-221-2/+6
* Finish renaming remaining analyzeBranch functionsMatt Arsenault2016-09-141-2/+2
* Make analyzeBranch family of instruction names consistentMatt Arsenault2016-09-141-2/+2
* AArch64: Use TTI branch functions in branch relaxationMatt Arsenault2016-09-141-2/+7
* [stackmaps] More extraction of common code [NFCI]Philip Reames2016-08-231-2/+3
* MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun2016-07-281-2/+2
* TargetInstrInfo: rename GetInstSizeInBytes to getInstSizeInBytes. NFCSjoerd Meijer2016-07-281-1/+1
* PowerPC: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-271-67/+66
* Rename AnalyzeBranch* to analyzeBranch*.Jacques Pienaar2016-07-151-1/+2
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-104/+99
* Drop support for creating $stubs.Rafael Espindola2016-06-291-1/+1
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-17/+17
* [PPC64] Fix SUBFC8 Defs listKeno Fischer2016-06-011-0/+2
* [Power9] Add support for -mcpu=pwr9 in the back endNemanja Ivanovic2016-05-091-0/+4
* [PowerPC] [SSP] Fix stack guard load for 32-bit.Marcin Koscielnicki2016-04-211-1/+1
* [PPC, SSP] Support PowerPC Linux stack protection.Tim Shen2016-04-191-0/+16
* [PPC64] Mark CR0 Live if PPCInstrInfo::optimizeCompareInstr Creates a Use of CR0Chuang-Yu Cheng2016-04-121-0/+4
* Codegen: [PPC] Word Rotates are Zero Extending.Kyle Butt2016-03-231-1/+8
* CodeGen: TII: Take MachineInstr& in predicate API, NFCDuncan P. N. Exon Smith2016-02-231-64/+61
* Remove uses of builtin comma operator.Richard Trieu2016-02-181-6/+6
* Codegen: [PPC] Silence false-positive initialization warning. NFCKyle Butt2016-01-151-2/+2
* Codegen: [PPC] Handle weighted comparisons when inserting selects.Kyle Butt2016-01-121-10/+33
* Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical...Craig Topper2015-12-051-2/+2
* replace MachineCombinerPattern namespace and enum with enum class; NFCISanjay Patel2015-11-051-1/+1
* Improved the interface of methods commuting operands, improved X86-FMA3 mem-f...Andrew Kaylor2015-09-281-8/+10
* [Machine Combiner] Refactor machine reassociation code to be target-independent.Chad Rosier2015-09-211-211/+6
* Pass BranchProbability/BlockMass by value instead of const& as they are small...Cong Hou2015-09-101-1/+1
* [PowerPC] Don't commute trivial rlwimi instructionsHal Finkel2015-09-061-0/+5
* [MIR Serialization] static -> static const in getSerializable*MachineOperandT...Hal Finkel2015-08-301-2/+2
* [PowerPC/MIR Serialization] Target flags serialization supportHal Finkel2015-08-301-0/+32
* PseudoSourceValue: Replace global manager with a manager in a machine function.Alex Lorenz2015-08-111-10/+8
* [PowerPC] Use the MachineCombiner to reassociate fadd/fmulHal Finkel2015-07-151-0/+262
* [PowerPC] Fix the PPCInstrInfo::getInstrLatency implementationHal Finkel2015-07-141-0/+33
* [PPC] Replace debug value skipping with getLastNonDebugInstr.Benjamin Kramer2015-06-251-16/+7
* [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC.Ahmed Bougacha2015-06-111-10/+7
* Remove 3 includes from MCInstrDesc.h and explicitly include them where neededPete Cooper2015-05-151-0/+1
* Add VSX Scalar loads and stores to the PPC back endNemanja Ivanovic2015-05-071-1/+12
* Add Hardware Transactional Memory (HTM) SupportKit Barton2015-03-251-0/+53
* Disabling warnings for MSVC build to enable /W4 use.Andrew Kaylor2015-03-241-2/+1
* Remove the need to cache the subtarget in the PowerPC TargetRegisterInfoEric Christopher2015-03-121-1/+1
* [PowerPC] Add support for the QPX vector instruction setHal Finkel2015-02-251-0/+42
* [PowerPC] Support non-direct-sub/superclass VSX copiesHal Finkel2015-02-161-4/+4
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