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path: root/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
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* [PowerPC] Do not emit record-form rotates when record-form andi/andis sufficesNemanja Ivanovic2018-09-181-6/+28
* [PowerPC] Optimize compares fed by ANDISoNemanja Ivanovic2018-09-181-1/+2
* [PowerPC] Emit xscpsgndp instead of xxlor when copying floating point scalar ...Stefan Pintilie2018-08-241-1/+1
* [PowerPC] Add a peephole post RA to transform the inst that fed by addQingShan Zhang2018-08-201-44/+313
* Remove trailing spaceFangrui Song2018-07-301-2/+2
* Introduce codegen for the Signal Processing EngineJustin Hibbits2018-07-181-2/+25
* [PowerPC] Materialize more constants with CR-field set in late peepholeNemanja Ivanovic2018-07-131-5/+28
* If the arch is P9, we will select the DFLOADf32/DFLOADf64 pseudo instruction ...QingShan Zhang2018-06-191-1/+8
* [PowerPC] fix trivial typos in comment, NFCHiroshi Inoue2018-06-131-4/+4
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-10/+11
* [PowerPC] Fix condition for 64-bit rotate when replacing r+r instr with r+iNemanja Ivanovic2018-04-111-1/+2
* [PowerPC] Infrastructure work. Implement getting the opcode for a spill in on...Stefan Pintilie2018-03-261-248/+269
* Re-commit: [MachineLICM] Add functions to MachineLICM to hoist invariant storesZaara Syeda2018-03-231-23/+2
* Revert [MachineLICM] This reverts commit rL327856Zaara Syeda2018-03-191-2/+23
* [MachineLICM] Add functions to MachineLICM to hoist invariant storesZaara Syeda2018-03-191-23/+2
* [PowerPC] Do not emit record-form rotates when record-form andi sufficesNemanja Ivanovic2018-03-051-0/+27
* [PowerPC] Don't miscompile rotate+mask into an ANDIo if it can't recreate the...Benjamin Kramer2018-01-121-0/+4
* [PowerPC] Fix for PR35688 - handle out-of-range values for r+r to r+i conversionNemanja Ivanovic2017-12-291-21/+65
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-1/+1
* Fix the second build bot break introduced by r320791.Nemanja Ivanovic2017-12-151-0/+7
* Fix code causing fallthrough warnings in the PPC back end.Nemanja Ivanovic2017-12-151-0/+1
* Fix the build bot break introduced by r320791.Nemanja Ivanovic2017-12-151-1/+6
* [PowerPC] Convert r+r instructions to r+i (pre and post RA)Nemanja Ivanovic2017-12-151-0/+814
* [CodeGen] Print global addresses as @foo in both MIR and debug outputFrancis Visoiu Mistrih2017-12-141-1/+1
* Rename LiveIntervalAnalysis.h to LiveIntervals.hMatthias Braun2017-12-131-1/+1
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-3/+3
* [CodeGen] Print "%vreg0" as "%0" in both MIR and debug outputFrancis Visoiu Mistrih2017-11-301-1/+1
* [PowerPC] Relax the checking on AND/AND8 in isSignOrZeroExtended.Sean Fertile2017-11-291-3/+31
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-3/+3
* [PowerPC] Remove redundant TOC savesZaara Syeda2017-11-271-0/+14
* [PPC] Heuristic to choose between a X-Form VSX ld/st vs a X-Form FP ld/st.Tony Jiang2017-11-201-23/+84
* [PowerPC] Use record-form instruction for Less-or-Equal -1 and Greater-or-Equ...Hiroshi Inoue2017-10-261-30/+39
* [PowerPC] Use helper functions to check sign-/zero-extended valueHiroshi Inoue2017-10-181-23/+11
* [PowerPC] fix up in sign-/zero-extension eliminationHiroshi Inoue2017-10-161-0/+2
* [PowerPC] Eliminate sign- and zero-extensions if already sign- or zero-extendedHiroshi Inoue2017-10-161-0/+239
* [PowerPC] Utilize DQ-Form instructions for spill/restore and fix FrameIndex e...Lei Huang2017-10-111-4/+4
* [PowerPC] eliminate unconditional branch to the next instructionHiroshi Inoue2017-09-271-0/+14
* [Power9] Spill gprs to vector registers rather than stackZaara Syeda2017-09-211-1/+70
* [PowerPC] enable optimizeCompareInstr for branch with static branch hintHiroshi Inoue2017-07-271-7/+15
* fix formatting issue; NFCHiroshi Inoue2017-07-181-4/+6
* [PowerPC] define target hook isReallyTriviallyReMaterializable()Lei Huang2017-06-211-0/+23
* [PowerPC] fix potential verification errors on CFENCE8Hiroshi Inoue2017-06-151-1/+1
* [PowerPC] Eliminate integer compare instructions - vol. 2Nemanja Ivanovic2017-05-311-0/+4
* [PPC] Fix assertion failure during binary encoding with -mcpu=pwr9Hiroshi Inoue2017-05-291-0/+2
* SummaryHiroshi Inoue2017-05-211-6/+44
* [PPC] Lower load acquire/seq_cst trailing fence to cmp + bne + isync.Tim Shen2017-05-161-0/+13
* Re-commit r301040 "X86: Don't emit zero-byte functions on Windows"Hans Wennborg2017-04-211-2/+2
* Revert r301040 "X86: Don't emit zero-byte functions on Windows"Hans Wennborg2017-04-211-2/+2
* X86: Don't emit zero-byte functions on WindowsHans Wennborg2017-04-211-2/+2
* Remove an oddly unnecessary temporary.Eric Christopher2017-03-271-2/+1
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