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author | Tony Jiang <jtony@ca.ibm.com> | 2017-01-16 15:01:07 +0000 |
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committer | Tony Jiang <jtony@ca.ibm.com> | 2017-01-16 15:01:07 +0000 |
commit | 8da139a9fd06dbee54cccc452860e42e847501bc (patch) | |
tree | b8e7fa84a96758ab81f8b84bc377b21d319daba7 /llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | |
parent | 3e91519a1c21ac9343483ff2a3294ee2f5cd7142 (diff) | |
download | bcm5719-llvm-8da139a9fd06dbee54cccc452860e42e847501bc.tar.gz bcm5719-llvm-8da139a9fd06dbee54cccc452860e42e847501bc.zip |
Revert "[PowerPC] Expand ISEL instruction into if-then-else sequence."
This reverts commit 1d0e0374438ca6e153844c683826ba9b82486bb1.
llvm-svn: 292131
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCInstrInfo.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp index 315911db4e3..51c86dd2170 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -696,6 +696,9 @@ bool PPCInstrInfo::canInsertSelect(const MachineBasicBlock &MBB, ArrayRef<MachineOperand> Cond, unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const { + if (!Subtarget.hasISEL()) + return false; + if (Cond.size() != 2) return false; @@ -737,6 +740,9 @@ void PPCInstrInfo::insertSelect(MachineBasicBlock &MBB, assert(Cond.size() == 2 && "PPC branch conditions have two components!"); + assert(Subtarget.hasISEL() && + "Cannot insert select on target without ISEL support"); + // Get the register classes. MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); const TargetRegisterClass *RC = |