diff options
| author | Kyle Butt <kyle+llvm@iteratee.net> | 2016-03-23 19:51:22 +0000 |
|---|---|---|
| committer | Kyle Butt <kyle+llvm@iteratee.net> | 2016-03-23 19:51:22 +0000 |
| commit | 613112826e1088a90b3e95597b0f7049d35bcb4b (patch) | |
| tree | a8f85c4bfaa3350ac658b3e8b552f6bce06e5803 /llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | |
| parent | f54146c1789544b7348823a3cc6f488009de630e (diff) | |
| download | bcm5719-llvm-613112826e1088a90b3e95597b0f7049d35bcb4b.tar.gz bcm5719-llvm-613112826e1088a90b3e95597b0f7049d35bcb4b.zip | |
Codegen: [PPC] Word Rotates are Zero Extending.
Add Word rotates to the list of instructions that are zero extending.
This allows them to be used in dot form to compare with zero.
llvm-svn: 264183
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp index e6842b8637c..76f97b1ceaf 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -1568,11 +1568,18 @@ bool PPCInstrInfo::optimizeCompareInstr(MachineInstr *CmpInstr, } else return false; } else if (is32BitUnsignedCompare) { + // 32-bit rotate and mask instructions are zero extending only if MB <= ME + bool isZeroExtendingRotate = + (MIOpC == PPC::RLWINM || MIOpC == PPC::RLWINMo || + MIOpC == PPC::RLWNM || MIOpC == PPC::RLWNMo) + && MI->getOperand(3).getImm() <= MI->getOperand(4).getImm(); + // We can perform this optimization, equality only, if MI is // zero-extending. if (MIOpC == PPC::CNTLZW || MIOpC == PPC::CNTLZWo || MIOpC == PPC::SLW || MIOpC == PPC::SLWo || - MIOpC == PPC::SRW || MIOpC == PPC::SRWo) { + MIOpC == PPC::SRW || MIOpC == PPC::SRWo || + isZeroExtendingRotate) { noSub = true; equalityOnly = true; } else |
