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path: root/llvm/lib/Target/ARM/ARMISelLowering.cpp
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* Emit diagnostic if an inline asm constraint requires an immediateBill Wendling2019-08-031-5/+6
* Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders2019-08-011-1/+1
* [ARM] Lower "(x<<c) > 0x80000000U" to "lsls" on Thumb1.Eli Friedman2019-07-311-0/+25
* [ARM] Transform compare of masked value to shift on Thumb1.Eli Friedman2019-07-311-0/+37
* [ARM] Better patterns for fp <> predicate vectorsDavid Green2019-07-281-4/+0
* [ARM] Rewrite how VCMP are lowered, using a single nodeDavid Green2019-07-241-104/+106
* [ARM] Disable MVE fptosi and friendsDavid Green2019-07-241-0/+4
* [ARM] Better OR's for MVE comparesDavid Green2019-07-241-0/+57
* [ARM] MVE floating point compares and selectsDavid Green2019-07-241-1/+13
* [ARM] MVE predicate register supportDavid Green2019-07-241-13/+307
* [ARM] MVE integer compares and selectsDavid Green2019-07-241-5/+48
* [ARM][LowOverheadLoops] Fix branch target codegenSam Parker2019-07-231-26/+157
* [ARM] Rename NEONModImm to VMOVModImm. NFCDavid Green2019-07-231-16/+16
* [IPRA][ARM] Make use of the "returned" parameter attributeOliver Stannard2019-07-221-0/+6
* [ARM][DAGCOMBINE][FIX] PerformVMOVRRDCombineDiogo N. Sampaio2019-07-181-3/+5
* Fix parameter name comments using clang-tidy. NFC.Rui Ueyama2019-07-161-3/+3
* [ARM] MVE vector for 64bit typesDavid Green2019-07-151-0/+6
* [ARM] MVE Vector ShiftsDavid Green2019-07-151-5/+8
* [ARM] Adjust how NEON shifts are loweredDavid Green2019-07-151-115/+136
* [ARM] Add sign and zero extend patterns for MVEDavid Green2019-07-131-1/+1
* [ARM] MVE integer absDavid Green2019-07-131-0/+1
* [ARM] MVE integer min and maxDavid Green2019-07-131-0/+4
* [ARM] MVE VRINT supportDavid Green2019-07-131-0/+2
* [ARM] MVE minnm and maxnm instructionsDavid Green2019-07-131-4/+9
* [ARM][LowOverheadLoops] Correct offset checkingSam Parker2019-07-111-8/+12
* [ARM] Fix null pointer dereference in CodeGen/ARM/Windows/stack-protector-msv...Fangrui Song2019-07-081-6/+8
* [ARM] Add support for MSVC stack cookie checkingMartin Storsjo2019-07-071-0/+30
* [ARM] MVE VMOV immediate handlingDavid Green2019-07-051-9/+18
* [ARM] MVE fp to int conversionsDavid Green2019-07-051-0/+7
* [ARM] Favour PL/MI over GE/LT when possibleDavid Green2019-07-041-0/+19
* [ARM] Fix for NDEBUG buildsSam Parker2019-07-031-4/+3
* [Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457)Roman Lebedev2019-07-031-0/+9
* [ARM] MVE: allow soft-float ABI to pass vector types.Simon Tatham2019-07-021-2/+36
* [ARM] Stop using scalar FP instructions in integer-only MVE mode.Simon Tatham2019-07-021-16/+31
* [ARM] MVE: support QQPRRegClass and QQQQPRRegClassMikhail Maltsev2019-07-011-2/+3
* [ARM] WLS/LE Code GenerationSam Parker2019-07-011-0/+42
* [ARM] Add support for the MVE long shift instructionsSam Tebbs2019-06-281-2/+55
* [ARM] Mark math routines as non-legal for MVEDavid Green2019-06-281-0/+9
* [ARM] Widening loads and narrowing storesDavid Green2019-06-281-4/+21
* [ARM] MVE loads and storesDavid Green2019-06-281-11/+49
* [ARM] Mark div and rem as expand for MVEDavid Green2019-06-281-0/+12
* [ARM] MVE vector shufflesDavid Green2019-06-281-61/+128
* [ARM] Fix formatting issue in ARMISelLowering.cppSam Tebbs2019-06-271-1/+2
* [ARM] Don't reserve R12 on Thumb1 as an emergency spill slot.Eli Friedman2019-06-261-1/+2
* [ARM] Fix -Wimplicit-fallthrough after D60709/r364331Fangrui Song2019-06-261-4/+3
* [ARM] Support inline assembler constraints for MVE.Simon Tatham2019-06-251-1/+22
* [ARM] Code-generation infrastructure for MVE.Simon Tatham2019-06-251-5/+32
* [ARM] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds after D60692Fangrui Song2019-06-251-0/+1
* [ARM] Explicit lowering of half <-> double conversions.Simon Tatham2019-06-251-11/+68
* [TargetLowering] Add MachineMemOperand::Flags to allowsMemoryAccess tests (PR...Simon Pilgrim2019-06-121-4/+7
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